ARM: DT: apq8064: add support to sdcc4 for wlan.
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Wed, 17 Sep 2014 05:39:35 +0000 (06:39 +0100)
committerKumar Gala <galak@codeaurora.org>
Wed, 17 Sep 2014 22:24:14 +0000 (17:24 -0500)
This patch adds sdcc4 node to enable wlan support on IFC6410

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
arch/arm/boot/dts/qcom-apq8064.dtsi

index 90db8af51f3a79d31f7039a2503c0e686625c20b..27c7dfeec186efec96db2893390a1b27533500ea 100644 (file)
                        sdcc3: sdcc@12180000 {
                                status = "okay";
                        };
+                       /* WLAN */
+                       sdcc4: sdcc@121c0000 {
+                               status = "okay";
+                       };
                };
        };
 };
index b1e476ac5edf6b72d111248dde777589365a2830..f31d20b3ceb423bf4c1234e11de8eb32dbcde90f 100644 (file)
                        pinctrl-names = "default";
                        pinctrl-0 = <&ps_hold>;
 
+                       sdc4_gpios: sdc4-gpios {
+                               pios {
+                                       pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
+                                       function = "sdc4";
+                               };
+                       };
+
                        ps_hold: ps_hold {
                                mux {
                                        pins = "gpio78";
                        qcom,ee = <0>;
                };
 
+               sdcc4bam:dma@121c2000{
+                       compatible = "qcom,bam-v1.3.0";
+                       reg = <0x121c2000 0x8000>;
+                       interrupts = <0 95 0>;
+                       clocks = <&gcc SDC4_H_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+               };
+
                amba {
                        compatible = "arm,amba-bus";
                        #address-cells = <1>;
                                dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
                                dma-names = "tx", "rx";
                        };
+
+                       sdcc4: sdcc@121c0000 {
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               status          = "disabled";
+                               reg             = <0x121c0000 0x2000>;
+                               interrupts      = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <4>;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               max-frequency   = <48000000>;
+                               vmmc-supply = <&vsdcc_fixed>;
+                               vqmmc-supply = <&vsdcc_fixed>;
+                               dmas = <&sdcc4bam 2>, <&sdcc4bam 1>;
+                               dma-names = "tx", "rx";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&sdc4_gpios>;
+                       };
                };
        };
 };