mutex_unlock(&ctx->state_lock);
ctx->is_stream_off = false;
+ ctx->v4l_resolution_change = false;
}
} else
ctx->is_out_stream_off = false;
struct aml_vcodec_ctx *ctx = vb2_get_drv_priv(q);
ctx->has_receive_eos = false;
+
v4l2_m2m_set_dst_buffered(ctx->fh.m2m_ctx, true);
v4l_dbg(ctx, V4L_DEBUG_CODEC_PROT,
* @param_change: indicate encode parameter type
* @param_sets_from_ucode: if true indicate ps from ucode.
* @v4l_codec_dpb_ready: queue buffer number greater than dpb.
+ # @v4l_resolution_change: indicate resolution change happend.
* @comp: comp be used for sync picture information with decoder.
* @config: used to set or get parms for application.
* @picinfo: store picture info after header parsing.
int dpb_size;
bool param_sets_from_ucode;
bool v4l_codec_dpb_ready;
+ bool v4l_resolution_change;
struct completion comp;
struct v4l2_config_parm config;
struct vdec_pic_info picinfo;
unsigned int last_picture_slice_count;
unsigned int first_pre_frame_num;
#endif
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
u32 b_frame_error_count;
struct vdec_info gvs;
u32 kpi_first_i_comming;
u32 index);
static void release_aux_data(struct vdec_h264_hw_s *hw,
int buf_spec_num);
+static void clear_refer_bufs(struct vdec_h264_hw_s *hw);
#ifdef ERROR_HANDLE_TEST
static void h264_clear_dpb(struct vdec_h264_hw_s *hw);
#endif
int allocated_count = 0;
if (hw->is_used_v4l) {
+ struct h264_dpb_stru *dpb = &hw->dpb;
+
+ if (dpb->mDPB.used_size >= dpb->mDPB.size - 1)
+ return 0;
+
for (i = 0; i < hw->dpb.mDPB.size; i++) {
if (hw->buffer_spec[i].used == 0 &&
hw->buffer_spec[i].vf_ref == 0 &&
vdec_v4l_set_ps_infos(ctx, &ps);
vdec_v4l_res_ch_event(ctx);
hw->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
amvdec_stop();
if (hw->mmu_enable)
amhevc_stop();
}
hw->v4l_params_parsed = true;
vdec_v4l_set_ps_infos(ctx, &ps);
+ clear_refer_bufs(hw);
+
amvdec_stop();
if (hw->mmu_enable)
amhevc_stop();
- }
- else {
+ } else {
if (vh264_set_params(hw, param1,
param2, param3, param4, false) < 0)
dpb_print(DECODE_ID(hw), 0, "set parameters error\n");
v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx) <
run_ready_min_buf_num)
ret = 0;
+ else if (ctx->v4l_codec_dpb_ready &&
+ !is_buffer_available(vdec))
+ ret = 0;
} else {
- if ((hw->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
ret = 0;
}
} else if (!ctx->v4l_codec_dpb_ready) {
static void clear_refer_bufs(struct vdec_h264_hw_s *hw)
{
int i;
+ ulong flags;
- mutex_lock(&vmh264_mutex);
- dealloc_buf_specs(hw, 1);
- mutex_unlock(&vmh264_mutex);
+ if (hw->is_used_v4l) {
+ spin_lock_irqsave(&hw->bufspec_lock, flags);
+ for (i = 0; i < BUFSPEC_POOL_SIZE; i++) {
+ hw->buffer_spec[i].used = -1;
+ hw->buffer_spec[i].cma_alloc_addr = 0;
+ hw->buffer_spec[i].buf_adr = 0;
+ }
+ spin_unlock_irqrestore(&hw->bufspec_lock, flags);
+ }
INIT_KFIFO(hw->display_q);
INIT_KFIFO(hw->newframe_q);
}
hw->eos = 0;
hw->decode_pic_count = 0;
- hw->dec_result = DEC_RESULT_NONE;
- /* v4l will reset on every res change */
- hw->res_ch_flag = 0;
- clear_refer_bufs(hw);
reset_process_time(hw);
h264_reset_bufmgr(vdec);
/*hw->decode_pic_count = 0;
hw->seq_info2 = 0;*/
- hw->cfg_param1 = READ_VREG(AV_SCRATCH_1);
- hw->cfg_param2 = READ_VREG(AV_SCRATCH_2);
- hw->cfg_param3 = READ_VREG(AV_SCRATCH_6);
- hw->cfg_param4 = READ_VREG(AV_SCRATCH_B);
+ if (!hw->is_used_v4l) {
+ hw->cfg_param1 = READ_VREG(AV_SCRATCH_1);
+ hw->cfg_param2 = READ_VREG(AV_SCRATCH_2);
+ hw->cfg_param3 = READ_VREG(AV_SCRATCH_6);
+ hw->cfg_param4 = READ_VREG(AV_SCRATCH_B);
+ }
if (vh264_set_params(hw,
hw->cfg_param1,
u32 mem_map_mode;
u32 performance_profile;
struct vdec_info *gvs;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
bool ip_mode;
u32 kpi_first_i_comming;
u32 kpi_first_i_decoded;
vdec_v4l_res_ch_event(ctx);
hevc->v4l_params_parsed = false;
hevc->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
hevc->eos = 1;
flush_output(hevc, NULL);
//del_timer_sync(&hevc->timer);
run_ready_min_buf_num)
ret = 0;
} else {
- if ((hevc->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
ret = 0;
}
} else if (!ctx->v4l_codec_dpb_ready) {
int dynamic_buf_num_margin;
int sidebind_type;
int sidebind_channel_id;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
u32 canvas_mode;
u32 canvas_endian;
};
vdec_v4l_res_ch_event(ctx);
hw->v4l_params_parsed = false;
hw->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
hw->eos = 1;
notify_v4l_eos(hw_to_vdec(hw));
run_ready_min_buf_num)
return 0;
} else {
- if ((hw->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
return 0;
}
} else if (!ctx->v4l_codec_dpb_ready) {
u32 dynamic_buf_num_margin;
struct vdec_info gvs;
struct vframe_qos_s vframe_qos;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
u32 i_only;
u32 kpi_first_i_comming;
u32 kpi_first_i_decoded;
vdec_v4l_res_ch_event(ctx);
hw->v4l_params_parsed = false;
hw->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
hw->eos = 1;
flush_output(hw);
notify_v4l_eos(hw_to_vdec(hw));
if (!ctx->v4l_codec_dpb_ready)
return 0;
} else {
- if ((hw->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
return 0;
}
} else if (!ctx->v4l_codec_dpb_ready) {
u32 i_only;
int sidebind_type;
int sidebind_channel_id;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
unsigned int i_decoded_frames;
unsigned int i_lost_frames;
unsigned int i_concealed_frames;
vdec_v4l_res_ch_event(ctx);
hw->v4l_params_parsed = false;
hw->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
hw->eos = 1;
flush_output(hw);
notify_v4l_eos(hw_to_vdec(hw));
run_ready_min_buf_num)
return 0;
} else {
- if ((hw->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
return 0;
}
} else if (!ctx->v4l_codec_dpb_ready) {
u32 mem_map_mode;
u32 dynamic_buf_num_margin;
struct vframe_s vframe_dummy;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
int buffer_wrap[FRAME_BUFFERS];
};
static void av1_dump_state(struct vdec_s *vdec);
vdec_v4l_res_ch_event(ctx);
hw->v4l_params_parsed = false;
hw->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
hw->eos = 1;
//del_timer_sync(&pbi->timer);
notify_v4l_eos(hw_to_vdec(hw));
run_ready_min_buf_num)
ret = 0;
} else {
- if ((hw->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
ret = 0;
}
} else if (ctx->cap_pool.in < ctx->dpb_size) {
u32 mem_map_mode;
u32 dynamic_buf_num_margin;
struct vframe_s vframe_dummy;
- unsigned int res_ch_flag;
+ u32 res_ch_flag;
/*struct VP9Decoder_s vp9_decoder;*/
union param_u vp9_param;
int sidebind_type;
if (pbi->is_used_v4l && ctx->param_sets_from_ucode)
pbi->res_ch_flag = 0;
+
bit_depth_luma = pbi->vp9_param.p.bit_depth;
bit_depth_chroma = pbi->vp9_param.p.bit_depth;
vdec_v4l_res_ch_event(ctx);
pbi->v4l_params_parsed = false;
pbi->res_ch_flag = 1;
+ ctx->v4l_resolution_change = 1;
pbi->eos = 1;
vp9_bufmgr_postproc(pbi);
//del_timer_sync(&pbi->timer);
pbi->run_ready_min_buf_num)
ret = 0;
} else {
- if ((pbi->res_ch_flag == 1) &&
- ((ctx->state <= AML_STATE_INIT) ||
- (ctx->state >= AML_STATE_FLUSHING)))
+ if (ctx->v4l_resolution_change)
ret = 0;
}
} else if (ctx->cap_pool.in < ctx->dpb_size) {