drm/nouveau/fb/ramgt215: Restructure r111100 calculation for DDR2
authorRoy Spliet <rspliet@eclipso.eu>
Tue, 29 Sep 2015 23:23:47 +0000 (00:23 +0100)
committerBen Skeggs <bskeggs@redhat.com>
Tue, 3 Nov 2015 05:02:18 +0000 (15:02 +1000)
Seems to be mostly equal to DDR3 on < GT218, should improve stability for
DDR2 reclocks.

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

index 8d81bf1e9a5555e000863b7640b4487f88840540..d15ea886df270d4a1652ec9a5c56e68cea3f85e3 100644 (file)
@@ -771,39 +771,43 @@ gt215_ram_calc(struct nvkm_ram *base, u32 freq)
        unk71c  = ram_rd32(fuc, 0x10071c) & ~0x00000100;
        r111100 = ram_rd32(fuc, 0x111100) & ~0x3a800000;
 
-       if (next->bios.ramcfg_10_02_04) {
-               switch (ram->base.type) {
-               case NVKM_RAM_TYPE_DDR3:
-                       if (device->chipset != 0xa8)
-                               r111100 |= 0x00000004;
-                       /* no break */
-               case NVKM_RAM_TYPE_DDR2:
-                       r111100 |= 0x08000000;
-                       break;
-               default:
-                       break;
-               }
-       } else {
-               switch (ram->base.type) {
-               case NVKM_RAM_TYPE_DDR2:
-                       r111100 |= 0x1a800000;
+       /* NVA8 seems to skip various bits related to ramcfg_10_02_04 */
+       if (device->chipset == 0xa8) {
+               r111100 |= 0x08000000;
+               if (!next->bios.ramcfg_10_02_04)
                        unk714  |= 0x00000010;
-                       break;
-               case NVKM_RAM_TYPE_DDR3:
-                       if (device->chipset == 0xa8) {
-                               r111100 |=  0x08000000;
-                       } else {
-                               r111100 &= ~0x00000004;
+       } else {
+               if (next->bios.ramcfg_10_02_04) {
+                       switch (ram->base.type) {
+                       case NVKM_RAM_TYPE_DDR2:
+                       case NVKM_RAM_TYPE_DDR3:
+                               r111100 &= ~0x00000020;
+                               if (next->bios.ramcfg_10_02_10)
+                                       r111100 |= 0x08000004;
+                               else
+                                       r111100 |= 0x00000024;
+                               break;
+                       default:
+                               break;
+                       }
+               } else {
+                       switch (ram->base.type) {
+                       case NVKM_RAM_TYPE_DDR2:
+                       case NVKM_RAM_TYPE_DDR3:
+                               r111100 &= ~0x00000024;
                                r111100 |=  0x12800000;
+
+                               if (next->bios.ramcfg_10_02_10)
+                                       r111100 |= 0x08000000;
+                               unk714  |= 0x00000010;
+                               break;
+                       case NVKM_RAM_TYPE_GDDR3:
+                               r111100 |= 0x30000000;
+                               unk714  |= 0x00000020;
+                               break;
+                       default:
+                               break;
                        }
-                       unk714  |= 0x00000010;
-                       break;
-               case NVKM_RAM_TYPE_GDDR3:
-                       r111100 |= 0x30000000;
-                       unk714  |= 0x00000020;
-                       break;
-               default:
-                       break;
                }
        }