[ARM] mm 9: add additional device memory types
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Sat, 5 May 2007 19:28:16 +0000 (20:28 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 5 May 2007 19:28:16 +0000 (20:28 +0100)
Add cached device type for ioremap_cached().  Group all device memory
types together, and ensure that they all have a "MT_DEVICE" prefix.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-ixp2000/core.c
arch/arm/mach-ixp2000/enp2611.c
arch/arm/mm/mmu.c
include/asm-arm/mach/map.h

index 27b7480f4afe94cc873fb62e9547c67b8cf86caa..9cf2498dc99eaaf418082af8e206af2274860911 100644 (file)
@@ -84,59 +84,59 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
                .virtual        = IXP2000_CAP_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
                .length         = IXP2000_CAP_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_INTCTL_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
                .length         = IXP2000_INTCTL_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_PCI_CREG_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
                .length         = IXP2000_PCI_CREG_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_PCI_CSR_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
                .length         = IXP2000_PCI_CSR_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_MSF_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
                .length         = IXP2000_MSF_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_SCRATCH_RING_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
                .length         = IXP2000_SCRATCH_RING_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_SRAM0_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
                .length         = IXP2000_SRAM0_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_PCI_IO_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
                .length         = IXP2000_PCI_IO_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_PCI_CFG0_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
                .length         = IXP2000_PCI_CFG0_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = IXP2000_PCI_CFG1_VIRT_BASE,
                .pfn            = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
                .length         = IXP2000_PCI_CFG1_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }
 };
 
 void __init ixp2000_map_io(void)
 {
        /*
-        * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that
+        * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that
         * XCB=101 (to avoid triggering erratum #66), and given that
         * this mode speeds up I/O accesses and we have write buffer
         * flushes in the right places anyway, it doesn't hurt to use
index ac29298c5d3f237f24d1691c6d8cf2928616ab00..500e997ba7a427bd554be9bff1f75f82e2863947 100644 (file)
@@ -70,17 +70,17 @@ static struct map_desc enp2611_io_desc[] __initdata = {
                .virtual        = ENP2611_CALEB_VIRT_BASE,
                .pfn            = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE),
                .length         = ENP2611_CALEB_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = ENP2611_PM3386_0_VIRT_BASE,
                .pfn            = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE),
                .length         = ENP2611_PM3386_0_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }, {
                .virtual        = ENP2611_PM3386_1_VIRT_BASE,
                .pfn            = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE),
                .length         = ENP2611_PM3386_1_SIZE,
-               .type           = MT_IXP2000_DEVICE,
+               .type           = MT_DEVICE_IXP2000,
        }
 };
 
index 44f385a3eb3fbedf6141f5000e53d6c3bc972bbb..2ba1530d1ce147952b202ac6861591359c0c743b 100644 (file)
@@ -176,14 +176,35 @@ void adjust_cr(unsigned long mask, unsigned long set)
 }
 #endif
 
+#define PROT_PTE_DEVICE                L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
+#define PROT_SECT_DEVICE       PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE
+
 static struct mem_type mem_types[] = {
-       [MT_DEVICE] = {
-               .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
-                               L_PTE_WRITE,
-               .prot_l1   = PMD_TYPE_TABLE,
-               .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED |
-                               PMD_SECT_AP_WRITE,
-               .domain    = DOMAIN_IO,
+       [MT_DEVICE] = {           /* Strongly ordered / ARMv6 shared device */
+               .prot_pte       = PROT_PTE_DEVICE,
+               .prot_l1        = PMD_TYPE_TABLE,
+               .prot_sect      = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
+               .domain         = DOMAIN_IO,
+       },
+       [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
+               .prot_pte       = PROT_PTE_DEVICE,
+               .prot_pte_ext   = PTE_EXT_TEX(2),
+               .prot_l1        = PMD_TYPE_TABLE,
+               .prot_sect      = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
+               .domain         = DOMAIN_IO,
+       },
+       [MT_DEVICE_CACHED] = {    /* ioremap_cached */
+               .prot_pte       = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE,
+               .prot_l1        = PMD_TYPE_TABLE,
+               .prot_sect      = PROT_SECT_DEVICE | PMD_SECT_WB,
+               .domain         = DOMAIN_IO,
+       },      
+       [MT_DEVICE_IXP2000] = {   /* IXP2400 requires XCB=101 for on-chip I/O */
+               .prot_pte       = PROT_PTE_DEVICE,
+               .prot_l1        = PMD_TYPE_TABLE,
+               .prot_sect      = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
+                                 PMD_SECT_TEX(1),
+               .domain         = DOMAIN_IO,
        },
        [MT_CACHECLEAN] = {
                .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
@@ -213,21 +234,6 @@ static struct mem_type mem_types[] = {
                .prot_sect = PMD_TYPE_SECT,
                .domain    = DOMAIN_KERNEL,
        },
-       [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */
-               .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
-                               L_PTE_WRITE,
-               .prot_l1   = PMD_TYPE_TABLE,
-               .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED |
-                               PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
-                               PMD_SECT_TEX(1),
-               .domain    = DOMAIN_IO,
-       },
-       [MT_NONSHARED_DEVICE] = {
-               .prot_l1   = PMD_TYPE_TABLE,
-               .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_NONSHARED_DEV |
-                               PMD_SECT_AP_WRITE,
-               .domain    = DOMAIN_IO,
-       }
 };
 
 const struct mem_type *get_mem_type(unsigned int type)
index cef5364ed5feb0531cc39b3bee6ccdf01426562d..8afef40730afbb9d621d86801727a80c3ddb651b 100644 (file)
@@ -17,14 +17,18 @@ struct map_desc {
 };
 
 #define MT_DEVICE              0
-#define MT_CACHECLEAN          1
-#define MT_MINICLEAN           2
-#define MT_LOW_VECTORS         3
-#define MT_HIGH_VECTORS                4
-#define MT_MEMORY              5
-#define MT_ROM                 6
-#define MT_IXP2000_DEVICE      7
-#define MT_NONSHARED_DEVICE    8
+#define MT_DEVICE_NONSHARED    1
+#define MT_DEVICE_CACHED       2
+#define MT_DEVICE_IXP2000      3
+#define MT_CACHECLEAN          4
+#define MT_MINICLEAN           5
+#define MT_LOW_VECTORS         6
+#define MT_HIGH_VECTORS                7
+#define MT_MEMORY              8
+#define MT_ROM                 9
+
+#define MT_NONSHARED_DEVICE    MT_DEVICE_NONSHARED
+#define MT_IXP2000_DEVICE      MT_DEVICE_IXP2000
 
 #ifdef CONFIG_MMU
 extern void iotable_init(struct map_desc *, int);