dmaengine: at_hdmac: Fix at_lli struct definition

commit f1171bbdd2ba2a50ee64bb198a78c268a5baf5f1 upstream.

Those hardware registers are all of 32 bits, while dma_addr_t ca be of
type u64 or u32 depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to
comply with what the hardware expects.

Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: stable@vger.kernel.org
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com
Link: https://lore.kernel.org/r/20221025090306.297886-2-tudor.ambarus@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index 7f58f06157f6a35c9268b81472acb5ce8ea3aa87..f1fc4094d712a7232413df063d7bd5e5bcd95609 100644 (file)
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -168,13 +168,13 @@
 /* LLI == Linked List Item; aka DMA buffer descriptor */
 struct at_lli {
        /* values that are not changed by hardware */
-       dma_addr_t      saddr;
-       dma_addr_t      daddr;
+       u32 saddr;
+       u32 daddr;
        /* value that may get written back: */
-       u32             ctrla;
+       u32 ctrla;
        /* more values that are not changed by hardware */
-       u32             ctrlb;
-       dma_addr_t      dscr;   /* chain to next lli */
+       u32 ctrlb;
+       u32 dscr;       /* chain to next lli */
 };
 
 /**