arm64: dts: lg: Fix SPI controller node names
authorRob Herring <robh@kernel.org>
Thu, 13 Sep 2018 18:12:44 +0000 (13:12 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 25 Nov 2019 08:53:06 +0000 (09:53 +0100)
[ Upstream commit 09bae3b64cb580c95329bd8d16f08f0a5cb81ec9 ]

SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.

Cc: Chanho Min <chanho.min@lge.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/lg/lg1312.dtsi
arch/arm64/boot/dts/lg/lg1313.dtsi

index fbafa24cd5335b90de29af9a3f3a731bc616ac10..5e0c5dc973e3383fcca7ccd4a07605f2e839e87b 100644 (file)
                        clock-names = "apb_pclk";
                        status="disabled";
                };
-               spi0: ssp@fe800000 {
+               spi0: spi@fe800000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x0 0xfe800000 0x1000>;
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clk_bus>;
                        clock-names = "apb_pclk";
                };
-               spi1: ssp@fe900000 {
+               spi1: spi@fe900000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x0 0xfe900000 0x1000>;
                        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
index e703e1149c7570829201538d713c84688d72c180..f3b1ba6f74220a8794984bd27750674742f894a6 100644 (file)
                        clock-names = "apb_pclk";
                        status="disabled";
                };
-               spi0: ssp@fe800000 {
+               spi0: spi@fe800000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x0 0xfe800000 0x1000>;
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clk_bus>;
                        clock-names = "apb_pclk";
                };
-               spi1: ssp@fe900000 {
+               spi1: spi@fe900000 {
                        compatible = "arm,pl022", "arm,primecell";
                        reg = <0x0 0xfe900000 0x1000>;
                        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;