spi: pic32-sqi: add binding document for PIC32 Quad-SPI driver.
authorPurna Chandra Mandal <purna.mandal@microchip.com>
Fri, 15 Apr 2016 11:27:18 +0000 (16:57 +0530)
committerMark Brown <broonie@kernel.org>
Mon, 18 Apr 2016 16:52:46 +0000 (17:52 +0100)
Document Device tree bindings for the quad SPI peripheral
found on Microchip PIC32 class devices.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <rob@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Documentation/devicetree/bindings/spi/sqi-pic32.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/spi/sqi-pic32.txt b/Documentation/devicetree/bindings/spi/sqi-pic32.txt
new file mode 100644 (file)
index 0000000..c82d021
--- /dev/null
@@ -0,0 +1,18 @@
+Microchip PIC32 Quad SPI controller
+-----------------------------------
+Required properties:
+- compatible: Should be "microchip,pic32mzda-sqi".
+- reg: Address and length of SQI controller register space.
+- interrupts: Should contain SQI interrupt.
+- clocks: Should contain phandle of two clocks in sequence, one that drives
+          clock on SPI bus and other that drives SQI controller.
+- clock-names: Should be "spi_ck" and "reg_ck" in order.
+
+Example:
+       sqi1: spi@1f8e2000 {
+               compatible = "microchip,pic32mzda-sqi";
+               reg = <0x1f8e2000 0x200>;
+               clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;
+               clock-names = "spi_ck", "reg_ck";
+               interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;
+       };