#include <dspbridge/io_sm.h>
-static struct hw_mmu_map_attrs_t map_attrs = { HW_LITTLE_ENDIAN,
- HW_ELEM_SIZE16BIT,
- HW_MMU_CPUES
-};
-
static void *dummy_va_addr;
int bridge_deh_create(struct deh_mgr **ret_deh_mgr,
* the base image. */
/* Get Bridge context info. */
dev_get_bridge_context(hdev_obj, &hbridge_context);
- DBC_ASSERT(hbridge_context);
- dummy_va_addr = NULL;
/* Allocate IO manager object: */
deh_mgr = kzalloc(sizeof(struct deh_mgr), GFP_KERNEL);
if (!deh_mgr) {
status = -ENOMEM;
- goto leave;
+ goto err;
}
/* Create an NTFY object to manage notifications */
deh_mgr->ntfy_obj = kmalloc(sizeof(struct ntfy_object), GFP_KERNEL);
- if (deh_mgr->ntfy_obj) {
- ntfy_init(deh_mgr->ntfy_obj);
- } else {
+ if (!deh_mgr->ntfy_obj) {
status = -ENOMEM;
goto err;
}
+ ntfy_init(deh_mgr->ntfy_obj);
/* Create a MMUfault DPC */
tasklet_init(&deh_mgr->dpc_tasklet, mmu_fault_dpc, (u32) deh_mgr);
deh_mgr->err_info.dw_val3 = 0L;
/* Install ISR function for DSP MMU fault */
- if ((request_irq(INT_DSP_MMU_IRQ, mmu_fault_isr, 0,
- "DspBridge\tiommu fault",
- (void *)deh_mgr)) == 0)
- status = 0;
- else
- status = -EPERM;
+ status = request_irq(INT_DSP_MMU_IRQ, mmu_fault_isr, 0,
+ "DspBridge\tiommu fault", deh_mgr);
+ if (status < 0)
+ goto err;
-err:
- if (DSP_FAILED(status)) {
- /* If create failed, cleanup */
- bridge_deh_destroy(deh_mgr);
- deh_mgr = NULL;
- }
-leave:
*ret_deh_mgr = deh_mgr;
+ return 0;
+err:
+ bridge_deh_destroy(deh_mgr);
+ *ret_deh_mgr = NULL;
return status;
}
u32 notify_type,
struct dsp_notification *hnotification)
{
- int status = 0;
-
if (!deh_mgr)
return -EFAULT;
if (event_mask)
- status = ntfy_register(deh_mgr->ntfy_obj, hnotification,
- event_mask, notify_type);
+ return ntfy_register(deh_mgr->ntfy_obj, hnotification,
+ event_mask, notify_type);
else
- status = ntfy_unregister(deh_mgr->ntfy_obj, hnotification);
-
- return status;
+ return ntfy_unregister(deh_mgr->ntfy_obj, hnotification);
}
void bridge_deh_notify(struct deh_mgr *deh_mgr, u32 ulEventMask, u32 dwErrInfo)
{
struct bridge_dev_context *dev_context;
- int status = 0;
u32 hw_mmu_max_tlb_count = 31;
struct cfg_hostres *resources;
- hw_status hw_status_obj;
+ struct hw_mmu_map_attrs_t map_attrs = {
+ .endianism = HW_LITTLE_ENDIAN,
+ .element_size = HW_ELEM_SIZE16BIT,
+ .mixed_size = HW_MMU_CPUES,
+ };
if (!deh_mgr)
return;
dev_info(bridge, "%s: device exception\n", __func__);
- dev_context = (struct bridge_dev_context *)deh_mgr->hbridge_context;
+ dev_context = deh_mgr->hbridge_context;
resources = dev_context->resources;
switch (ulEventMask) {
(unsigned int) deh_mgr->err_info.dw_val2,
(unsigned int) fault_addr);
dummy_va_addr = (void*)__get_free_page(GFP_ATOMIC);
- dev_context = (struct bridge_dev_context *)
- deh_mgr->hbridge_context;
print_dsp_trace_buffer(dev_context);
dump_dl_modules(dev_context);
dev_context->num_tlb_entries =
dev_context->fixed_tlb_entries;
}
- if (DSP_SUCCEEDED(status)) {
- hw_status_obj =
- hw_mmu_tlb_add(resources->dw_dmmu_base,
- virt_to_phys(dummy_va_addr), fault_addr,
- HW_PAGE_SIZE4KB, 1,
- &map_attrs, HW_SET, HW_SET);
- }
+ hw_mmu_tlb_add(resources->dw_dmmu_base,
+ virt_to_phys(dummy_va_addr), fault_addr,
+ HW_PAGE_SIZE4KB, 1,
+ &map_attrs, HW_SET, HW_SET);
dsp_clk_enable(DSP_CLK_GPT8);
/* Clear MMU interrupt */
hw_mmu_event_ack(resources->dw_dmmu_base,
HW_MMU_TRANSLATION_FAULT);
- dump_dsp_stack(deh_mgr->hbridge_context);
+ dump_dsp_stack(dev_context);
dsp_clk_disable(DSP_CLK_GPT8);
break;
#ifdef CONFIG_BRIDGE_NTFY_PWRERR
int bridge_deh_get_info(struct deh_mgr *deh_mgr,
struct dsp_errorinfo *pErrInfo)
{
- DBC_REQUIRE(deh_mgr);
- DBC_REQUIRE(pErrInfo);
-
if (!deh_mgr)
return -EFAULT;