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clk: renesas: r8a7795: Add USB-DMAC ch3 clock
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Wed, 19 Apr 2017 17:46:24 +0000 (02:46 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 May 2017 07:46:31 +0000 (09:46 +0200)
This patch supports the clock of USB-DMAC ch3 module added from R8A7795
ES2.0 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c patch | blob | blame | history

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 3eb8db1868e068859f07593a6728f8fbc20cbf0f..58dd5b6bef0d0531ba637cb05dfa5a6b87b99eee 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -141,8 +141,10 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("sdif0",                 314,   R8A7795_CLK_SD0),
        DEF_MOD("pcie1",                 318,   R8A7795_CLK_S3D1),
        DEF_MOD("pcie0",                 319,   R8A7795_CLK_S3D1),
+       DEF_MOD("usb-dmac30",            326,   R8A7795_CLK_S3D1),
        DEF_MOD("usb3-if1",              327,   R8A7795_CLK_S3D1), /* ES1.x */
        DEF_MOD("usb3-if0",              328,   R8A7795_CLK_S3D1),
+       DEF_MOD("usb-dmac31",            329,   R8A7795_CLK_S3D1),
        DEF_MOD("usb-dmac0",             330,   R8A7795_CLK_S3D1),
        DEF_MOD("usb-dmac1",             331,   R8A7795_CLK_S3D1),
        DEF_MOD("rwdt",                  402,   R8A7795_CLK_R),