ARM: dts: imx27-phytec-phycore-rdk: Add CSI enable switch

This patch adds a GPIO fixed regulator which used on RDK to
enable CSI bus.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index ac18ccfa9309f566d9b13ef0c3fb5cbfd9cc90a5..72c773e2bf989aaa8d5b16eaf6f79eaa4ac12a96 100644 (file)
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -38,6 +38,20 @@
                };
        };
 
+       regulators {
+               regulator@2 {
+                       compatible = "regulator-fixed";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_csien>;
+                       reg = <2>;
+                       regulator-name = "CSI_EN";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
+                       regulator-always-on;
+               };
+       };
+
        usbphy {
                usbphy2: usbphy@2 {
                        compatible = "usb-nop-xceiv";
@@ -83,6 +97,12 @@
 
 &iomuxc {
        imx27_phycore_rdk {
+               pinctrl_csien: csiengrp {
+                       fsl,pins = <
+                               MX27_PAD_USB_OC_B__GPIO2_24 0x0
+                       >;
+               };
+
                pinctrl_cspi1cs1: cspi1cs1grp {
                        fsl,pins = <
                                MX27_PAD_CSPI1_SS1__GPIO4_27 0x0