PCI: rockchip: Reconfigure configuration space header type

Per PCIe base specification (Revision 3.1a), section 7.5.3, type 1
configuration space header should be used when accessing PCIe switch.  So
we need to reconfigure the header according to the bus number we are
accessing.  Otherwise we could not visit the buses behind the switch.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 1b9c58dc7d4c789e5f62944c27775d2f4bba281d..c283633181d346f602efb827ea1a0b7845dab825 100644 (file)
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -378,6 +378,13 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip,
                return PCIBIOS_BAD_REGISTER_NUMBER;
        }
 
+       if (bus->parent->number == rockchip->root_bus_nr)
+               rockchip_pcie_cfg_configuration_accesses(rockchip,
+                                               AXI_WRAPPER_TYPE0_CFG);
+       else
+               rockchip_pcie_cfg_configuration_accesses(rockchip,
+                                               AXI_WRAPPER_TYPE1_CFG);
+
        if (size == 4) {
                *val = readl(rockchip->reg_base + busdev);
        } else if (size == 2) {
@@ -402,6 +409,13 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip,
        if (!IS_ALIGNED(busdev, size))
                return PCIBIOS_BAD_REGISTER_NUMBER;
 
+       if (bus->parent->number == rockchip->root_bus_nr)
+               rockchip_pcie_cfg_configuration_accesses(rockchip,
+                                               AXI_WRAPPER_TYPE0_CFG);
+       else
+               rockchip_pcie_cfg_configuration_accesses(rockchip,
+                                               AXI_WRAPPER_TYPE1_CFG);
+
        if (size == 4)
                writel(val, rockchip->reg_base + busdev);
        else if (size == 2)