* GNU General Public License for more details.
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <asm/div64.h>
#include <linux/dvb/frontend.h>
#include "dvb_math.h"
#define DBG_REG 2
#define DBG_DUMP 4 /* FGR - comment out to remove dump code */
-#define lg_printk(kern, fmt, arg...) \
- printk(kern "%s(): " fmt, __func__, ##arg)
+#define lg_debug(fmt, arg...) \
+ printk(KERN_DEBUG pr_fmt(fmt), ## arg)
+
+#define dbg_info(fmt, arg...) \
+ do { \
+ if (debug & DBG_INFO) \
+ lg_debug(fmt, ## arg); \
+ } while (0)
-#define lg_info(fmt, arg...) printk(KERN_INFO "lgdt3306a: " fmt, ##arg)
-#define lg_warn(fmt, arg...) lg_printk(KERN_WARNING, fmt, ##arg)
-#define lg_err(fmt, arg...) lg_printk(KERN_ERR, fmt, ##arg)
-#define lg_dbg(fmt, arg...) if (debug & DBG_INFO) \
- lg_printk(KERN_DEBUG, fmt, ##arg)
-#define lg_reg(fmt, arg...) if (debug & DBG_REG) \
- lg_printk(KERN_DEBUG, fmt, ##arg)
+#define dbg_reg(fmt, arg...) \
+ do { \
+ if (debug & DBG_REG) \
+ lg_debug(fmt, ## arg); \
+ } while (0)
#define lg_chkerr(ret) \
({ \
int __ret; \
__ret = (ret < 0); \
if (__ret) \
- lg_err("error %d on line %d\n", ret, __LINE__); \
+ pr_err("error %d on line %d\n", ret, __LINE__); \
__ret; \
})
.buf = buf, .len = 3,
};
- lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);
+ dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val);
ret = i2c_transfer(state->i2c_adap, &msg, 1);
if (ret != 1) {
- lg_err("error (addr %02x %02x <- %02x, err = %i)\n",
+ pr_err("error (addr %02x %02x <- %02x, err = %i)\n",
msg.buf[0], msg.buf[1], msg.buf[2], ret);
if (ret < 0)
return ret;
ret = i2c_transfer(state->i2c_adap, msg, 2);
if (ret != 2) {
- lg_err("error (addr %02x reg %04x error (ret == %i)\n",
+ pr_err("error (addr %02x reg %04x error (ret == %i)\n",
state->cfg->i2c_addr, reg, ret);
if (ret < 0)
return ret;
else
return -EREMOTEIO;
}
- lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, *val);
+ dbg_reg("reg: 0x%04x, val: 0x%02x\n", reg, *val);
return 0;
}
u8 val;
int ret;
- lg_reg("reg: 0x%04x, bit: %d, level: %d\n", reg, bit, onoff);
+ dbg_reg("reg: 0x%04x, bit: %d, level: %d\n", reg, bit, onoff);
ret = lgdt3306a_read_reg(state, reg, &val);
if (lg_chkerr(ret))
{
int ret;
- lg_dbg("\n");
+ dbg_info("\n");
ret = lgdt3306a_set_reg_bit(state, 0x0000, 7, 0);
if (lg_chkerr(ret))
u8 val;
int ret;
- lg_dbg("(%d)\n", mode);
+ dbg_info("(%d)\n", mode);
/* transport packet format */
ret = lgdt3306a_set_reg_bit(state, 0x0071, 7, mode == LGDT3306A_MPEG_PARALLEL?1:0); /* TPSENB=0x80 */
if (lg_chkerr(ret))
u8 val;
int ret;
- lg_dbg("edge=%d, valid=%d\n", edge, valid);
+ dbg_info("edge=%d, valid=%d\n", edge, valid);
ret = lgdt3306a_read_reg(state, 0x0070, &val);
if (lg_chkerr(ret))
u8 val;
int ret;
- lg_dbg("(%d)\n", mode);
+ dbg_info("(%d)\n", mode);
if (mode) {
ret = lgdt3306a_read_reg(state, 0x0070, &val);
{
struct lgdt3306a_state *state = fe->demodulator_priv;
- lg_dbg("acquire=%d\n", acquire);
+ dbg_info("acquire=%d\n", acquire);
return lgdt3306a_mpeg_tristate(state, acquire ? 0 : 1);
{
int ret;
- lg_dbg("(%d)\n", mode);
+ dbg_info("(%d)\n", mode);
if (mode == 0) {
ret = lgdt3306a_set_reg_bit(state, 0x0000, 7, 0); /* into reset */
u8 val;
int ret;
- lg_dbg("\n");
+ dbg_info("\n");
/* 0. Spectrum inversion detection manual; spectrum inverted */
ret = lgdt3306a_read_reg(state, 0x0002, &val);
if (lg_chkerr(ret))
goto fail;
- lg_dbg("complete\n");
+ dbg_info("complete\n");
fail:
return ret;
}
u8 val;
int ret;
- lg_dbg("modulation=%d\n", modulation);
+ dbg_info("modulation=%d\n", modulation);
/* 1. Selection of standard mode(0x08=QAM, 0x80=VSB) */
ret = lgdt3306a_write_reg(state, 0x0008, 0x08);
if (lg_chkerr(ret))
goto fail;
- lg_dbg("complete\n");
+ dbg_info("complete\n");
fail:
return ret;
}
{
int ret;
- lg_dbg("\n");
+ dbg_info("\n");
switch (p->modulation) {
case VSB_8:
struct dtv_frontend_properties *p)
{
/* TODO: anything we want to do here??? */
- lg_dbg("\n");
+ dbg_info("\n");
switch (p->modulation) {
case VSB_8:
{
int ret;
- lg_dbg("(%d)\n", inversion);
+ dbg_info("(%d)\n", inversion);
ret = lgdt3306a_set_reg_bit(state, 0x0002, 2, inversion ? 1 : 0);
return ret;
{
int ret;
- lg_dbg("(%d)\n", enabled);
+ dbg_info("(%d)\n", enabled);
/* 0=Manual 1=Auto(QAM only) */
ret = lgdt3306a_set_reg_bit(state, 0x0002, 3, enabled);/* SPECINVAUTO=0x04 */
{
int ret = 0;
- lg_dbg("(%d)\n", inversion);
+ dbg_info("(%d)\n", inversion);
#if 0
/* FGR - spectral_inversion defaults already set for VSB and QAM; can enable later if desired */
switch (if_freq_khz) {
default:
- lg_warn("IF=%d KHz is not supportted, 3250 assumed\n", if_freq_khz);
+ pr_warn("IF=%d KHz is not supportted, 3250 assumed\n", if_freq_khz);
/* fallthrough */
case 3250: /* 3.25Mhz */
nco1 = 0x34;
if (ret)
return ret;
- lg_dbg("if_freq=%d KHz->[%04x]\n", if_freq_khz, nco1<<8 | nco2);
+ dbg_info("if_freq=%d KHz->[%04x]\n", if_freq_khz, nco1<<8 | nco2);
return 0;
}
struct lgdt3306a_state *state = fe->demodulator_priv;
if (state->cfg->deny_i2c_rptr) {
- lg_dbg("deny_i2c_rptr=%d\n", state->cfg->deny_i2c_rptr);
+ dbg_info("deny_i2c_rptr=%d\n", state->cfg->deny_i2c_rptr);
return 0;
}
- lg_dbg("(%d)\n", enable);
+ dbg_info("(%d)\n", enable);
return lgdt3306a_set_reg_bit(state, 0x0002, 7, enable ? 0 : 1); /* NI2CRPTEN=0x80 */
}
{
int ret;
- lg_dbg("\n");
+ dbg_info("\n");
state->current_frequency = -1; /* force re-tune, when we wake */
ret = lgdt3306a_mpeg_tristate(state, 1); /* disable data bus */
u8 val;
int ret;
- lg_dbg("\n");
+ dbg_info("\n");
/* 1. Normal operation mode */
ret = lgdt3306a_set_reg_bit(state, 0x0001, 0, 1); /* SIMFASTENB=0x01 */
if (lg_chkerr(ret))
goto fail;
} else {
- lg_err("Bad xtalMHz=%d\n", state->cfg->xtalMHz);
+ pr_err("Bad xtalMHz=%d\n", state->cfg->xtalMHz);
}
#if 0
ret = lgdt3306a_write_reg(state, 0x000e, 0x00);
struct lgdt3306a_state *state = fe->demodulator_priv;
int ret;
- lg_dbg("(%d, %d)\n", p->frequency, p->modulation);
+ dbg_info("(%d, %d)\n", p->frequency, p->modulation);
if (state->current_frequency == p->frequency &&
state->current_modulation == p->modulation) {
- lg_dbg(" (already set, skipping ...)\n");
+ dbg_info(" (already set, skipping ...)\n");
return 0;
}
state->current_frequency = -1;
struct lgdt3306a_state *state = fe->demodulator_priv;
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
- lg_dbg("(%u, %d)\n", state->current_frequency, state->current_modulation);
+ dbg_info("(%u, %d)\n", state->current_frequency, state->current_modulation);
p->modulation = state->current_modulation;
p->frequency = state->current_frequency;
return ret;
fbDlyCir |= val;
- lg_dbg("snrRef=%d maxPowerMan=0x%x nCombDet=%d fbDlyCir=0x%x\n",
+ dbg_info("snrRef=%d maxPowerMan=0x%x nCombDet=%d fbDlyCir=0x%x\n",
snrRef, maxPowerMan, nCombDet, fbDlyCir);
/* Carrier offset sub loop bandwidth */
goto err;
if (val & 0x80) {
- lg_dbg("VSB\n");
+ dbg_info("VSB\n");
return LG3306_VSB;
}
if (val & 0x08) {
goto err;
val = val >> 2;
if (val & 0x01) {
- lg_dbg("QAM256\n");
+ dbg_info("QAM256\n");
return LG3306_QAM256;
} else {
- lg_dbg("QAM64\n");
+ dbg_info("QAM64\n");
return LG3306_QAM64;
}
}
err:
- lg_warn("UNKNOWN\n");
+ pr_warn("UNKNOWN\n");
return LG3306_UNKNOWN_MODE;
}
else
lockStatus = LG3306_UNLOCK;
- lg_dbg("SYNC_LOCK=%x\n", lockStatus);
+ dbg_info("SYNC_LOCK=%x\n", lockStatus);
break;
}
case LG3306_AGC_LOCK:
else
lockStatus = LG3306_UNLOCK;
- lg_dbg("AGC_LOCK=%x\n", lockStatus);
+ dbg_info("AGC_LOCK=%x\n", lockStatus);
break;
}
case LG3306_TR_LOCK:
} else
lockStatus = LG3306_UNKNOWN_LOCK;
- lg_dbg("TR_LOCK=%x\n", lockStatus);
+ dbg_info("TR_LOCK=%x\n", lockStatus);
break;
}
case LG3306_FEC_LOCK:
} else
lockStatus = LG3306_UNKNOWN_LOCK;
- lg_dbg("FEC_LOCK=%x\n", lockStatus);
+ dbg_info("FEC_LOCK=%x\n", lockStatus);
break;
}
default:
lockStatus = LG3306_UNKNOWN_LOCK;
- lg_warn("UNKNOWN whatLock=%d\n", whatLock);
+ pr_warn("UNKNOWN whatLock=%d\n", whatLock);
break;
}
return ret;
lockStatus = (enum lgdt3306a_neverlock_status)(val & 0x03);
- lg_dbg("NeverLock=%d", lockStatus);
+ dbg_info("NeverLock=%d", lockStatus);
return lockStatus;
}
return ret;
aiccrejStatus = (val & 0xf0) >> 4;
- lg_dbg("snrRef=%d mainStrong=%d aiccrejStatus=%d currChDiffACQ=0x%x\n",
+ dbg_info("snrRef=%d mainStrong=%d aiccrejStatus=%d currChDiffACQ=0x%x\n",
snrRef, mainStrong, aiccrejStatus, currChDiffACQ);
#if 0
syncLockStatus = lgdt3306a_check_lock_status(state, LG3306_SYNC_LOCK);
if (syncLockStatus == LG3306_LOCK) {
- lg_dbg("locked(%d)\n", i);
+ dbg_info("locked(%d)\n", i);
return LG3306_LOCK;
}
}
- lg_dbg("not locked\n");
+ dbg_info("not locked\n");
return LG3306_UNLOCK;
}
FECLockStatus = lgdt3306a_check_lock_status(state, LG3306_FEC_LOCK);
if (FECLockStatus == LG3306_LOCK) {
- lg_dbg("locked(%d)\n", i);
+ dbg_info("locked(%d)\n", i);
return FECLockStatus;
}
}
- lg_dbg("not locked\n");
+ dbg_info("not locked\n");
return FECLockStatus;
}
NLLockStatus = lgdt3306a_check_neverlock_status(state);
if (NLLockStatus == LG3306_NL_LOCK) {
- lg_dbg("NL_LOCK(%d)\n", i);
+ dbg_info("NL_LOCK(%d)\n", i);
return NLLockStatus;
}
}
- lg_dbg("NLLockStatus=%d\n", NLLockStatus);
+ dbg_info("NLLockStatus=%d\n", NLLockStatus);
return NLLockStatus;
}
return 0;
snr_x100 = log10_x1000((pwr * 10000) / mse) - 3000;
- lg_dbg("mse=%u, pwr=%u, snr_x100=%d\n", mse, pwr, snr_x100);
+ dbg_info("mse=%u, pwr=%u, snr_x100=%d\n", mse, pwr, snr_x100);
return snr_x100;
}
while (1) {
if (lgdt3306a_sync_lock_poll(state) == LG3306_UNLOCK) {
- lg_dbg("no sync lock!\n");
+ dbg_info("no sync lock!\n");
return LG3306_UNLOCK;
} else {
msleep(20);
packet_error = lgdt3306a_get_packet_error(state);
snr = lgdt3306a_calculate_snr_x100(state);
- lg_dbg("cnt=%d errors=%d snr=%d\n",
+ dbg_info("cnt=%d errors=%d snr=%d\n",
cnt, packet_error, snr);
if ((snr < 1500) || (packet_error >= 0xff))
return LG3306_LOCK;
if (cnt >= 10) {
- lg_dbg("not locked!\n");
+ dbg_info("not locked!\n");
return LG3306_UNLOCK;
}
}
while (1) {
if (lgdt3306a_fec_lock_poll(state) == LG3306_UNLOCK) {
- lg_dbg("no fec lock!\n");
+ dbg_info("no fec lock!\n");
return LG3306_UNLOCK;
} else {
msleep(20);
packet_error = lgdt3306a_get_packet_error(state);
snr = lgdt3306a_calculate_snr_x100(state);
- lg_dbg("cnt=%d errors=%d snr=%d\n",
+ dbg_info("cnt=%d errors=%d snr=%d\n",
cnt, packet_error, snr);
if ((snr < 1500) || (packet_error >= 0xff))
return LG3306_LOCK;
if (cnt >= 10) {
- lg_dbg("not locked!\n");
+ dbg_info("not locked!\n");
return LG3306_UNLOCK;
}
}
if (fe->ops.tuner_ops.get_rf_strength) {
ret = fe->ops.tuner_ops.get_rf_strength(fe, &strength);
if (ret == 0) {
- lg_dbg("strength=%d\n", strength);
+ dbg_info("strength=%d\n", strength);
} else {
- lg_dbg("fe->ops.tuner_ops.get_rf_strength() failed\n");
+ dbg_info("fe->ops.tuner_ops.get_rf_strength() failed\n");
}
}
str = (0xffff * str) / 100;
}
*strength = (u16)str;
- lg_dbg("strength=%u\n", *strength);
+ dbg_info("strength=%u\n", *strength);
fail:
return ret;
tmp = (tmp << 8) | read_reg(state, 0x00fe); /* NBERVALUE[8-15] */
tmp = (tmp << 8) | read_reg(state, 0x00ff); /* NBERVALUE[0-7] */
*ber = tmp;
- lg_dbg("ber=%u\n", tmp);
+ dbg_info("ber=%u\n", tmp);
#endif
return 0;
}
/* FGR - BUGBUG - I don't know what value is expected by dvb_core
* what happens when value wraps? */
*ucblocks = read_reg(state, 0x00f4); /* TPIFTPERRCNT[0-7] */
- lg_dbg("ucblocks=%u\n", *ucblocks);
+ dbg_info("ucblocks=%u\n", *ucblocks);
#endif
return 0;
int ret = 0;
struct lgdt3306a_state *state = fe->demodulator_priv;
- lg_dbg("re_tune=%u\n", re_tune);
+ dbg_info("re_tune=%u\n", re_tune);
if (re_tune) {
state->current_frequency = -1; /* force re-tune */
*fe_tune_settings)
{
fe_tune_settings->min_delay_ms = 100;
- lg_dbg("\n");
+ dbg_info("\n");
return 0;
}
/* wait frontend lock */
for (i = 20; i > 0; i--) {
- lg_dbg(": loop=%d\n", i);
+ dbg_info(": loop=%d\n", i);
msleep(50);
ret = lgdt3306a_read_status(fe, &status);
if (ret)
return DVBFE_ALGO_SEARCH_AGAIN;
error:
- lg_dbg("failed (%d)\n", ret);
+ dbg_info("failed (%d)\n", ret);
return DVBFE_ALGO_SEARCH_ERROR;
}
{
struct lgdt3306a_state *state = fe->demodulator_priv;
- lg_dbg("\n");
+ dbg_info("\n");
kfree(state);
}
int ret;
u8 val;
- lg_dbg("(%d-%04x)\n",
+ dbg_info("(%d-%04x)\n",
i2c_adap ? i2c_adapter_id(i2c_adap) : 0,
config ? config->i2c_addr : 0);
if (lg_chkerr(ret))
goto fail;
if ((val & 0x74) != 0x74) {
- lg_warn("expected 0x74, got 0x%x\n", (val & 0x74));
+ pr_warn("expected 0x74, got 0x%x\n", (val & 0x74));
#if 0
goto fail; /* BUGBUG - re-enable when we know this is right */
#endif
if (lg_chkerr(ret))
goto fail;
if ((val & 0xf6) != 0xc6) {
- lg_warn("expected 0xc6, got 0x%x\n", (val & 0xf6));
+ pr_warn("expected 0xc6, got 0x%x\n", (val & 0xf6));
#if 0
goto fail; /* BUGBUG - re-enable when we know this is right */
#endif
if (lg_chkerr(ret))
goto fail;
if ((val & 0x73) != 0x03) {
- lg_warn("expected 0x03, got 0x%x\n", (val & 0x73));
+ pr_warn("expected 0x03, got 0x%x\n", (val & 0x73));
#if 0
goto fail; /* BUGBUG - re-enable when we know this is right */
#endif
return &state->frontend;
fail:
- lg_warn("unable to detect LGDT3306A hardware\n");
+ pr_warn("unable to detect LGDT3306A hardware\n");
kfree(state);
return NULL;
}
return;
debug &= ~DBG_REG; /* suppress DBG_REG during reg dump */
- lg_info("\n");
+ lg_debug("\n");
for (i = 0; i < numDumpRegs; i++) {
lgdt3306a_read_reg(state, regtab[i], ®val1[i]);
if (regval1[i] != regval2[i]) {
- lg_info(" %04X = %02X\n", regtab[i], regval1[i]);
- regval2[i] = regval1[i];
+ lg_debug(" %04X = %02X\n", regtab[i], regval1[i]);
+ regval2[i] = regval1[i];
}
}
debug = sav_debug;
projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commitdiff