bnx2x: recognize fan failure

If fan failure is detected, MCP prevents PCI I/O registers from being
mapped to the bar, causing a fatal error as driver is unaware.

This patch recognizes such an event occurred and gracefully terminates
the probe process.

Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index c8ec3fcd2d35a033ac6f94db20d13548defc3a47..6064294802afb7909f847e6fe7c118b7bf200cbc 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -11570,6 +11570,14 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
                goto err_out_disable;
        }
 
+       pci_read_config_dword(pdev, PCICFG_REVISION_ID_OFFSET, &pci_cfg_dword);
+       if ((pci_cfg_dword & PCICFG_REVESION_ID_MASK) ==
+           PCICFG_REVESION_ID_ERROR_VAL) {
+               pr_err("PCI device error, probably due to fan failure, aborting\n");
+               rc = -ENODEV;
+               goto err_out_disable;
+       }
+
        if (atomic_read(&pdev->enable_cnt) == 1) {
                rc = pci_request_regions(pdev, DRV_MODULE_NAME);
                if (rc) {

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
index 87cf37c71b30f65ef35bb2f6b85a42ecf09f516c..bc2f65b32649de1dcbd5b456a4b915fdea9d1ef3 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
@@ -6160,7 +6160,9 @@
 #define PCICFG_COMMAND_INT_DISABLE             (1<<10)
 #define PCICFG_COMMAND_RESERVED                (0x1f<<11)
 #define PCICFG_STATUS_OFFSET                           0x06
-#define PCICFG_REVESION_ID_OFFSET                      0x08
+#define PCICFG_REVISION_ID_OFFSET                      0x08
+#define PCICFG_REVESION_ID_MASK                        0xff
+#define PCICFG_REVESION_ID_ERROR_VAL           0xff
 #define PCICFG_CACHE_LINE_SIZE                         0x0c
 #define PCICFG_LATENCY_TIMER                           0x0d
 #define PCICFG_BAR_1_LOW                               0x10