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perf/x86: Enable Intel Lincroft/Penwell/Cloverview Atom support
author
ShuoX Liu
<shuox.liu@intel.com>
Fri, 28 Dec 2012 16:48:44 +0000
(
00:48
+0800)
committer
Ingo Molnar
<mingo@kernel.org>
Thu, 24 Jan 2013 14:10:03 +0000
(15:10 +0100)
These three chip are based on Atom and have different model id.
So add such three id for perf HW event support.
Signed-off-by: ShuoX Liu <shuox.liu@intel.com>
Cc: yanmin_zhang@intel.linux.com
Cc: Stephane Eranian <eranian@google.com>
Link:
http://lkml.kernel.org/r/1356713324-12442-1-git-send-email-shuox.liu@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel.c
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diff --git
a/arch/x86/kernel/cpu/perf_event_intel.c
b/arch/x86/kernel/cpu/perf_event_intel.c
index 93b9e1181f830ff91b9ad432e0d148a38b0e93c3..cb313a56c21b5574f55122aad57cd454753bf0fd 100644
(file)
--- a/
arch/x86/kernel/cpu/perf_event_intel.c
+++ b/
arch/x86/kernel/cpu/perf_event_intel.c
@@
-2019,7
+2019,10
@@
__init int intel_pmu_init(void)
break;
case 28: /* Atom */
- case 54: /* Cedariew */
+ case 38: /* Lincroft */
+ case 39: /* Penwell */
+ case 53: /* Cloverview */
+ case 54: /* Cedarview */
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids));