serial: fsl-lpuart: add lpuart32 power management support
authorJingchang Lu <jingchang.lu@freescale.com>
Fri, 24 Oct 2014 09:20:49 +0000 (17:20 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 6 Nov 2014 22:57:25 +0000 (14:57 -0800)
This adds 32-bit register lpuart32 power management support,
this also updates the 8-bit register lpuart resume function.

Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/fsl_lpuart.c

index 6dd53af546a301bac38c8289e2f0b6487621d2e5..4e2577249ac51aefebfccf2a2caa608caf3d939f 100644 (file)
@@ -1862,6 +1862,20 @@ static int lpuart_suspend(struct device *dev)
 static int lpuart_resume(struct device *dev)
 {
        struct lpuart_port *sport = dev_get_drvdata(dev);
+       unsigned long temp;
+
+       if (sport->lpuart32) {
+               lpuart32_setup_watermark(sport);
+               temp = lpuart32_read(sport->port.membase + UARTCTRL);
+               temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE |
+                        UARTCTRL_TE | UARTCTRL_ILIE);
+               lpuart32_write(temp, sport->port.membase + UARTCTRL);
+       } else {
+               lpuart_setup_watermark(sport);
+               temp = readb(sport->port.membase + UARTCR2);
+               temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE);
+               writeb(temp, sport->port.membase + UARTCR2);
+       }
 
        uart_resume_port(&lpuart_reg, &sport->port);