PD #81802:thermal:add gpu freq control in m8b,do not control gpu core num

diff --git a/mali/platform/meson_m450/platform_m8b.c b/mali/platform/meson_m450/platform_m8b.c
index 8b2544e8eab5dce0c5d8b1ab33d505ab34b6c861..22291bb37b6fc0771e81e948ae0895d7395915e1 100755 (executable)
--- a/mali/platform/meson_m450/platform_m8b.c
+++ b/mali/platform/meson_m450/platform_m8b.c
@@ -23,7 +23,8 @@
 #include <common/mali_kernel_common.h>
 #include <common/mali_osk_profiling.h>
 #include <common/mali_pmu.h>
-
+#include <linux/gpu_cooling.h>
+#include <linux/gpucore_cooling.h>
 #include "meson_main.h"
 
 /**
@@ -62,6 +63,30 @@ u32 get_mali_tbl_size(void)
        return sizeof(mali_dvfs_clk) / sizeof(u32);
 }
 
+int get_mali_freq_level(int freq)
+{
+       int i = 0, level = -1;
+       if(freq < 0)
+               return level;
+       int mali_freq_num = sizeof(mali_dvfs_clk_sample) / sizeof(mali_dvfs_clk_sample[0]) - 1;
+       if(freq <= mali_dvfs_clk_sample[0])
+               level = mali_freq_num-1;
+       if(freq >= mali_dvfs_clk_sample[mali_freq_num - 1])
+               level = 0;
+       for(i=0; i<mali_freq_num - 1 ;i++) {
+               if(freq >= mali_dvfs_clk_sample[i] && freq<=mali_dvfs_clk_sample[i+1]) {
+                       level = i;
+                       level = mali_freq_num-level-1;
+               }
+       }
+       return level;
+}
+
+unsigned int get_mali_max_level(void)
+{
+       int mali_freq_num = sizeof(mali_dvfs_clk_sample) / sizeof(mali_dvfs_clk_sample[0]);
+       return mali_freq_num - 1;
+}
 #define MALI_PP_NUMBER 2
 
 static struct resource mali_gpu_resources[] =
@@ -90,6 +115,41 @@ int mali_meson_init_start(struct platform_device* ptr_plt_dev)
 int mali_meson_init_finish(struct platform_device* ptr_plt_dev)
 {
        mali_core_scaling_init(MALI_PP_NUMBER, mali_default_clock_idx);
+#ifdef CONFIG_GPU_THERMAL
+       int err;
+       struct gpufreq_cooling_device *gcdev = NULL;
+       gcdev = gpufreq_cooling_alloc();
+       if(IS_ERR(gcdev))
+               printk("malloc gpu cooling buffer error!!\n");
+       else if(!gcdev)
+               printk("system does not enable thermal driver\n");
+       else {
+               gcdev->get_gpu_freq_level = get_mali_freq_level;
+               gcdev->get_gpu_max_level = get_mali_max_level;
+               gcdev->set_gpu_freq_idx = set_max_mali_freq;
+               gcdev->get_gpu_current_max_level = get_max_mali_freq;
+               err = gpufreq_cooling_register(gcdev);
+               if(err < 0)
+                       printk("register GPU  cooling error\n");
+               printk("gpu cooling register okay with err=%d\n",err);
+       }
+#if 0
+       struct gpucore_cooling_device *gccdev=NULL;
+       gccdev=gpucore_cooling_alloc();
+       if(IS_ERR(gccdev))
+               printk("malloc gpu core cooling buffer error!!\n");
+       else if(!gccdev)
+               printk("system does not enable thermal driver\n");
+       else {
+               gccdev->max_gpu_core_num=MALI_PP_NUMBER;
+               gccdev->set_max_pp_num=set_max_pp_num;
+               err=gpucore_cooling_register(gccdev);
+               if(err < 0)
+                       printk("register GPU  cooling error\n");
+               printk("gpu core cooling register okay with err=%d\n",err);
+       }
+#endif
+#endif
        return 0;
 }