{
struct i2c_pnx_algo_data *alg_data = adap->algo_data;
- dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __FUNCTION__,
+ dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
slave_addr, alg_data->mif.mode);
/* Check for 7 bit slave addresses only */
iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
I2C_REG_STS(alg_data));
- dev_dbg(&adap->dev, "%s(): sending %#x\n", __FUNCTION__,
+ dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
(slave_addr << 1) | start_bit | alg_data->mif.mode);
/* Write the slave address, START bit and R/W bit */
iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
I2C_REG_TX(alg_data));
- dev_dbg(&adap->dev, "%s(): exit\n", __FUNCTION__);
+ dev_dbg(&adap->dev, "%s(): exit\n", __func__);
return 0;
}
long timeout = 1000;
dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
/* Write a STOP bit to TX FIFO */
iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
}
dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
}
/**
u32 val;
dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
if (alg_data->mif.len > 0) {
/* We still have something to talk about... */
alg_data->mif.len--;
iowrite32(val, I2C_REG_TX(alg_data));
- dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __FUNCTION__,
+ dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
val, alg_data->mif.len + 1);
if (alg_data->mif.len == 0) {
del_timer_sync(&alg_data->mif.timer);
dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
- __FUNCTION__);
+ __func__);
complete(&alg_data->mif.complete);
}
/* Stop timer. */
del_timer_sync(&alg_data->mif.timer);
dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
- "zero-xfer.\n", __FUNCTION__);
+ "zero-xfer.\n", __func__);
complete(&alg_data->mif.complete);
}
dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
return 0;
}
u32 ctl = 0;
dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
/* Check, whether there is already data,
* or we didn't 'ask' for it yet.
*/
if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
- "Rx-fifo...\n", __FUNCTION__);
+ "Rx-fifo...\n", __func__);
if (alg_data->mif.len == 1) {
/* Last byte, do not acknowledge next rcv. */
if (alg_data->mif.len > 0) {
val = ioread32(I2C_REG_RX(alg_data));
*alg_data->mif.buf++ = (u8) (val & 0xff);
- dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __FUNCTION__, val,
+ dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
alg_data->mif.len);
alg_data->mif.len--;
}
dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
return 0;
}
struct i2c_pnx_algo_data *alg_data = adap->algo_data;
dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
- __FUNCTION__,
+ __func__,
ioread32(I2C_REG_STS(alg_data)),
ioread32(I2C_REG_CTL(alg_data)),
alg_data->mif.mode);
/* Slave did not acknowledge, generate a STOP */
dev_dbg(&adap->dev, "%s(): "
"Slave did not acknowledge, generating a STOP.\n",
- __FUNCTION__);
+ __func__);
i2c_pnx_stop(adap);
/* Disable master interrupts. */
iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)),
+ __func__, ioread32(I2C_REG_STS(alg_data)),
ioread32(I2C_REG_CTL(alg_data)));
return IRQ_HANDLED;
u32 stat = ioread32(I2C_REG_STS(alg_data));
dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
- __FUNCTION__, num, ioread32(I2C_REG_STS(alg_data)));
+ __func__, num, ioread32(I2C_REG_STS(alg_data)));
bus_reset_if_active(adap);
alg_data->mif.ret = 0;
alg_data->last = (i == num - 1);
- dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __FUNCTION__,
+ dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
alg_data->mif.mode,
alg_data->mif.len);
if (!(rc = alg_data->mif.ret))
completed++;
dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
- __FUNCTION__, rc);
+ __func__, rc);
/* Clear TDI and AFI bits in case they are set. */
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
alg_data->mif.len = 0;
dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
- __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
+ __func__, ioread32(I2C_REG_STS(alg_data)));
if (completed != num)
return ((rc < 0) ? rc : -EREMOTEIO);
if (!i2c_pnx || !i2c_pnx->adapter) {
dev_err(&pdev->dev, "%s: no platform data supplied\n",
- __FUNCTION__);
+ __func__);
ret = -EINVAL;
goto out;
}
OTG_CTRL_REG |= OTG_PULLUP;
}
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
dump_regs(isp, "otg->isp1301");
}
if (otg_ctrl & OTG_DRIVER_SEL) {
switch (isp->otg.state) {
case OTG_STATE_A_IDLE:
- b_idle(isp, __FUNCTION__);
+ b_idle(isp, __func__);
break;
default:
break;
isp->otg.host->otg_port);
}
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
return ret;
}
if (!otg_dev)
return -ENODEV;
- dump_regs(isp, __FUNCTION__);
+ dump_regs(isp, __func__);
/* some of these values are board-specific... */
OTG_SYSCON_2_REG |= OTG_EN
/* for B-device: */
update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE));
update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
pr_debug("otg: %s, %s %06x\n",
- state_name(isp), __FUNCTION__, OTG_CTRL_REG);
+ state_name(isp), __func__, OTG_CTRL_REG);
OTG_IRQ_EN_REG = DRIVER_SWITCH | OPRT_CHG
| B_SRP_TMROUT | B_HNP_FAIL
OTG1_DP_PULLDOWN);
isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1,
OTG1_DP_PULLUP);
- dump_regs(isp, __FUNCTION__);
+ dump_regs(isp, __func__);
#endif
/* FALLTHROUGH */
case OTG_STATE_B_SRP_INIT:
- b_idle(isp, __FUNCTION__);
+ b_idle(isp, __func__);
OTG_CTRL_REG &= OTG_CTRL_REG & OTG_XCEIV_OUTPUTS;
/* FALLTHROUGH */
case OTG_STATE_B_IDLE:
*/
update_otg1(isp, isp_stat);
update_otg2(isp, isp_bstat);
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
#endif
dump_regs(isp, "isp1301->otg");
*/
isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_VBUS_DRV);
- dump_regs(isp, __FUNCTION__);
+ dump_regs(isp, __func__);
return 0;
isp1301_set_bits(isp, ISP1301_INTERRUPT_FALLING,
INTR_VBUS_VLD);
dev_info(&isp->client.dev, "B-Peripheral sessions ok\n");
- dump_regs(isp, __FUNCTION__);
+ dump_regs(isp, __func__);
/* If this has a Mini-AB connector, this mode is highly
* nonstandard ... but can be handy for testing, so long
pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), OTG_CTRL_REG);
#ifdef CONFIG_USB_OTG
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
#endif
return 0;
}
}
pr_debug("otg: HNP %s, %06x ...\n",
state_name(isp), OTG_CTRL_REG);
- check_state(isp, __FUNCTION__);
+ check_state(isp, __func__);
return 0;
#else
/* srp-only */
update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS));
#endif
- dump_regs(isp, __FUNCTION__);
+ dump_regs(isp, __func__);
#ifdef VERBOSE
mod_timer(&isp->timer, jiffies + TIMER_JIFFIES);