drm/i915/skl: Restore pipe B/C interrupts

Extending BDW implementation to gen9. Pipe B/C interrupt
restoration after exiting LPSP.

v2: Fix minor rebasing conflict.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d760e0659fa42d72e564d1290bf37df20a3b7cdb..fa87f1ec44ec71f4375f09354da481414482d8ec 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6277,7 +6277,7 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
        outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
        vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
 
-       if (IS_BROADWELL(dev))
+       if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9))
                gen8_irq_power_well_post_enable(dev_priv);
 }