The architectures supported by this driver, arm and sh, have expensive
implementations of writel(), reliant on spin locks and explicit L2 cache
management. These architectures provide a cheaper writel_relaxed() which
is much better suited to peripherals that do not perform DMA. The
situation with readl()/readl_relaxed()is similar although less acute.
This driver does not use DMA and will be more power efficient and more
robust (due to absence of spin locks during console I/O) if it uses the
relaxed variants.
The driver supports COMPILE_TEST and therefore falls back to writel()
when writel_relaxed() does not exist.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
Cc: Maxime Coquelin <maxime.coquelin@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: kernel@stlinux.com
Cc: linux-serial@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
static inline u32 asc_in(struct uart_port *port, u32 offset)
{
- return readl(port->membase + offset);
+ return readl_relaxed(port->membase + offset);
}
static inline void asc_out(struct uart_port *port, u32 offset, u32 value)
{
+#ifdef writel_relaxed
+ writel_relaxed(value, port->membase + offset);
+#else
writel(value, port->membase + offset);
+#endif
}
/*