Blackfin arch: convert L2 defines to be the same as the L1 defines
authorMike Frysinger <vapier.adi@gmail.com>
Wed, 13 Aug 2008 08:16:11 +0000 (16:16 +0800)
committerBryan Wu <cooloney@kernel.org>
Wed, 13 Aug 2008 08:16:11 +0000 (16:16 +0800)
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
arch/blackfin/kernel/cplb-nompu/cplbinit.c
arch/blackfin/kernel/setup.c
arch/blackfin/kernel/traps.c
arch/blackfin/kernel/vmlinux.lds.S
arch/blackfin/mm/blackfin_sram.c
include/asm-blackfin/mach-bf527/mem_map.h
include/asm-blackfin/mach-bf533/mem_map.h
include/asm-blackfin/mach-bf537/mem_map.h

index 224e7cc30bc599f23d4d8f73f2d161e0e85f004f..728f708d3981008d0f4bdc459054da549a03d84e 100644 (file)
@@ -164,17 +164,13 @@ static struct cplb_desc cplb_data[] = {
                .name = "Asynchronous Memory Banks",
        },
        {
-#ifdef L2_START
                .start = L2_START,
                .end = L2_START + L2_LENGTH,
                .psize = SIZE_1M,
                .attr = SWITCH_T | I_CPLB | D_CPLB,
                .i_conf = L2_MEMORY,
                .d_conf = L2_MEMORY,
-               .valid = 1,
-#else
-               .valid = 0,
-#endif
+               .valid = (L2_LENGTH > 0),
                .name = "L2 Memory",
        },
        {
index 15967e7578cd719edff33c16bebd57c9cb8d1767..936c06d820dec6b0673bf5cd2ee5ef37a8e23e80 100644 (file)
@@ -131,14 +131,14 @@ void __init bf53x_relocate_l1_mem(void)
        dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
                        l1_data_a_length, l1_data_b_length);
 
-#ifdef L2_LENGTH
-       l2_length = _ebss_l2 - _stext_l2;
-       if (l2_length > L2_LENGTH)
-               panic("L2 SRAM Overflow\n");
+       if (L2_LENGTH != 0) {
+               l2_length = _ebss_l2 - _stext_l2;
+               if (l2_length > L2_LENGTH)
+                       panic("L2 SRAM Overflow\n");
 
-       /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
-       dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
-#endif
+               /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
+               dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
+       }
 }
 
 /* add_memory_region to memmap */
index ad922ab915438ef3d66820809285e1f9a8477deb..62a47d67d876fbb5c1c953327da17bcf4c9e4ae9 100644 (file)
@@ -567,7 +567,7 @@ bool get_instruction(unsigned short *val, unsigned short *address)
         * we don't read something in the async space that can hang forever
         */
        if ((addr >= FIXED_CODE_START && (addr + 2) <= physical_mem_end) ||
-#ifdef L2_START
+#if L2_LENGTH != 0
            (addr >= L2_START && (addr + 2) <= (L2_START + L2_LENGTH)) ||
 #endif
            (addr >= BOOT_ROM_START && (addr + 2) <= (BOOT_ROM_START + BOOT_ROM_LENGTH)) ||
index d062597e6217faf7dff3b7e42e542bbd3929a299..7d12c6692a65a1d2d8e2de17049fb541b61df9c3 100644 (file)
@@ -102,7 +102,7 @@ SECTIONS
 #if !L1_DATA_B_LENGTH
                *(.l1.data.B)
 #endif
-#ifndef L2_LENGTH
+#if !L2_LENGTH
                . = ALIGN(32);
                *(.data_l2.cacheline_aligned)
                *(.l2.data)
@@ -212,20 +212,19 @@ SECTIONS
                __ebss_b_l1 = .;
        }
 
-#ifdef L2_LENGTH
        __l2_lma_start = .;
 
        .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
        {
                . = ALIGN(4);
                __stext_l2 = .;
-               *(.l1.text)
+               *(.l2.text)
                . = ALIGN(4);
                __etext_l2 = .;
 
                . = ALIGN(4);
                __sdata_l2 = .;
-               *(.l1.data)
+               *(.l2.data)
                __edata_l2 = .;
 
                . = ALIGN(32);
@@ -233,11 +232,10 @@ SECTIONS
 
                . = ALIGN(4);
                __sbss_l2 = .;
-               *(.l1.bss)
+               *(.l2.bss)
                . = ALIGN(4);
                __ebss_l2 = .;
        }
-#endif
 
        /* Force trailing alignment of our init section so that when we
         * free our init memory, we don't leave behind a partial page.
index 5af3c31c9365a8962d1d8d89a081f8764c16fa0f..9d2be43ac3da97fcc0360ff68dd0f4aadf9d6e00 100644 (file)
@@ -66,7 +66,7 @@ static struct sram_piece free_l1_data_B_sram_head, used_l1_data_B_sram_head;
 static struct sram_piece free_l1_inst_sram_head, used_l1_inst_sram_head;
 #endif
 
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
 static struct sram_piece free_l2_sram_head, used_l2_sram_head;
 #endif
 
@@ -175,7 +175,7 @@ static void __init l1_inst_sram_init(void)
 
 static void __init l2_sram_init(void)
 {
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
        free_l2_sram_head.next =
                kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
        if (!free_l2_sram_head.next) {
@@ -367,7 +367,7 @@ int sram_free(const void *addr)
                 && addr < (void *)(L1_DATA_B_START + L1_DATA_B_LENGTH))
                return l1_data_B_sram_free(addr);
 #endif
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
        else if (addr >= (void *)L2_START
                 && addr < (void *)(L2_START + L2_LENGTH))
                return l2_sram_free(addr);
@@ -604,7 +604,7 @@ int l1sram_free(const void *addr)
 
 void *l2_sram_alloc(size_t size)
 {
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
        unsigned flags;
        void *addr;
 
@@ -640,7 +640,7 @@ EXPORT_SYMBOL(l2_sram_zalloc);
 
 int l2_sram_free(const void *addr)
 {
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
        unsigned flags;
        int ret;
 
@@ -779,7 +779,7 @@ static int sram_proc_read(char *buf, char **start, off_t offset, int count,
                        &free_l1_inst_sram_head, &used_l1_inst_sram_head))
                goto not_done;
 #endif
-#ifdef L2_LENGTH
+#if L2_LENGTH != 0
        if (_sram_proc_read(buf, &len, count, "L2",
                        &free_l2_sram_head, &used_l2_sram_head))
                goto not_done;
index 193082deaa4e22214d510f88334eec59a9ecc3cb..ef46dc991cd447d0a7f33b3baee6f63e515b16fd 100644 (file)
 #define BFIN_DSUPBANKS 0
 #endif                         /*CONFIG_BFIN_DCACHE */
 
+/* Level 2 Memory - none */
+
+#define L2_START       0
+#define L2_LENGTH      0
+
 /* Scratch Pad Memory */
 
 #define L1_SCRATCH_START       0xFFB00000
index bd30b6f3be006bdab7d021866c003c1be5675666..581fc6eea789b189a31743d8f2ce90832fba053f 100644 (file)
 
 #endif
 
+/* Level 2 Memory - none */
+
+#define L2_START       0
+#define L2_LENGTH      0
+
 /* Scratch Pad Memory */
 
 #define L1_SCRATCH_START       0xFFB00000
index 5c6726d6f3b17c10f169049f3b0e48dcf99f315d..5078b669431f72204cb780d144167606192ec558 100644 (file)
 
 #endif
 
+/* Level 2 Memory - none */
+
+#define L2_START       0
+#define L2_LENGTH      0
+
 /* Scratch Pad Memory */
 
 #define L1_SCRATCH_START       0xFFB00000