ARM: tegra: document reset properties in DT bindings

Update all the Tegra DT bindings to require resets/reset-names properties
where the HW module has reset inputs. Remove any entries from clocks or
clock-names that were only required to identify reset inputs, rather than
referring to real clocks.

This is a DT-ABI-incompatible change. It is the first of two changes
required for me to consider the Tegra DT bindings as stable, the other
being conversion to the common DMA DT bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
index 0c80c267710451918297675c1e47f2020e183cff..9acea9d931600e01fe37ec0b40a25bcf82a2e864 100644 (file)
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra114-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                compatible = "nvidia,tegra114-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
+               #reset-cells = <1>;
        };
 
        usb@c5004000 {

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
index 1a91ec60dee5574ce8f158f185dae5acfa699d6f..ded5d6212c84dfc0c6e9a5774b1f8e8ce975b0cb 100644 (file)
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra124-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                compatible = "nvidia,tegra124-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
+               #reset-cells = <1>;
        };
 
        usb@c5004000 {

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
index fcfed5bf73fb8ad6c862457165445577bd25694f..6c5901b503d019adfcd0f24bc8c99aed03fb50f0 100644 (file)
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra20-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                compatible = "nvidia,tegra20-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
+               #reset-cells = <1>;
        };
 
        usb@c5004000 {

diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
index 0f714081e986b5c722d29d42a3599bd2399369cc..63618cde12df16a7e842834799f6f058bd2ac7a6 100644 (file)
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt
@@ -15,6 +15,9 @@ Required properties :
   In clock consumers, this cell represents the clock ID exposed by the
   CAR. The assignments may be found in header file
   <dt-bindings/clock/tegra30-car.h>.
+- #reset-cells : Should be 1.
+  In clock consumers, this cell represents the bit number in the CAR's
+  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
 
 Example SoC include file:
 
@@ -23,6 +26,7 @@ Example SoC include file:
                compatible = "nvidia,tegra30-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
+               #reset-cells = <1>;
        };
 
        usb@c5004000 {

diff --git a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
index e0a68b9728915a7301dfc9de61af01cc0ef21713..e0b166a7f04a99ed9e0f32e9617a93cc53960a1a 100644 (file)
--- a/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
+++ b/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
@@ -7,6 +7,10 @@ Required properties:
 - interrupts: Should contain all of the per-channel DMA interrupts.
 - clocks: Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - dma
 
 Examples:
 
@@ -30,4 +34,6 @@ apbdma: dma@6000a000 {
                       0 150 0x04
                       0 151 0x04 >;
        clocks = <&tegra_car 34>;
+       resets = <&tegra_car 34>;
+       reset-names = "dma";
 };

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 8b4367f86b9511f88becc70d86ef5c68fa18eeed..ab45c02aa658f666b78b1f4bedf4dc87255033db 100644 (file)
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -11,6 +11,10 @@ Required properties:
 - ranges: The mapping of the host1x address space to the CPU address space.
 - clocks: Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - host1x
 
 The host1x top-level node defines a number of children, each representing one
 of the following host1x client modules:
@@ -23,6 +27,10 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain one entry, for the module clock.
     See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - mpe
 
 - vi: video input
 
@@ -32,6 +40,10 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain one entry, for the module clock.
     See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - vi
 
 - epp: encoder pre-processor
 
@@ -41,6 +53,10 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain one entry, for the module clock.
     See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - epp
 
 - isp: image signal processor
 
@@ -50,6 +66,10 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain one entry, for the module clock.
     See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - isp
 
 - gr2d: 2D graphics engine
 
@@ -59,6 +79,10 @@ of the following host1x client modules:
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain one entry, for the module clock.
     See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 2d
 
 - gr3d: 3D graphics engine
 
@@ -72,6 +96,11 @@ of the following host1x client modules:
     - 3d
       This MUST be the first entry.
     - 3d2 (Only required on SoCs with two 3D clocks)
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 3d
+    - 3d2 (Only required on SoCs with two 3D clocks)
 
 - dc: display controller
 
@@ -85,6 +114,10 @@ of the following host1x client modules:
     - dc
       This MUST be the first entry.
     - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dc
 
   Each display controller node has a child node, named "rgb", that represents
   the RGB output associated with the controller. It can take the following
@@ -107,6 +140,10 @@ of the following host1x client modules:
     - hdmi
       This MUST be the first entry.
     - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - hdmi
 
   Optional properties:
   - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
@@ -133,6 +170,10 @@ of the following host1x client modules:
     - dsi
       This MUST be the first entry.
     - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dsi
 
 Example:
 
@@ -145,6 +186,8 @@ Example:
                interrupts = <0 65 0x04   /* mpcore syncpt */
                              0 67 0x04>; /* mpcore general */
                clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+               resets = <&tegra_car 28>;
+               reset-names = "host1x";
 
                #address-cells = <1>;
                #size-cells = <1>;
@@ -156,6 +199,8 @@ Example:
                        reg = <0x54040000 0x00040000>;
                        interrupts = <0 68 0x04>;
                        clocks = <&tegra_car TEGRA20_CLK_MPE>;
+                       resets = <&tegra_car 60>;
+                       reset-names = "mpe";
                };
 
                vi {
@@ -163,6 +208,8 @@ Example:
                        reg = <0x54080000 0x00040000>;
                        interrupts = <0 69 0x04>;
                        clocks = <&tegra_car TEGRA20_CLK_VI>;
+                       resets = <&tegra_car 100>;
+                       reset-names = "vi";
                };
 
                epp {
@@ -170,6 +217,8 @@ Example:
                        reg = <0x540c0000 0x00040000>;
                        interrupts = <0 70 0x04>;
                        clocks = <&tegra_car TEGRA20_CLK_EPP>;
+                       resets = <&tegra_car 19>;
+                       reset-names = "epp";
                };
 
                isp {
@@ -177,6 +226,8 @@ Example:
                        reg = <0x54100000 0x00040000>;
                        interrupts = <0 71 0x04>;
                        clocks = <&tegra_car TEGRA20_CLK_ISP>;
+                       resets = <&tegra_car 23>;
+                       reset-names = "isp";
                };
 
                gr2d {
@@ -184,12 +235,16 @@ Example:
                        reg = <0x54140000 0x00040000>;
                        interrupts = <0 72 0x04>;
                        clocks = <&tegra_car TEGRA20_CLK_GR2D>;
+                       resets = <&tegra_car 21>;
+                       reset-names = "2d";
                };
 
                gr3d {
                        compatible = "nvidia,tegra20-gr3d";
                        reg = <0x54180000 0x00040000>;
                        clocks = <&tegra_car TEGRA20_CLK_GR3D>;
+                       resets = <&tegra_car 24>;
+                       reset-names = "3d";
                };
 
                dc@54200000 {
@@ -199,6 +254,8 @@ Example:
                        clocks = <&tegra_car TEGRA20_CLK_DISP1>,
                                 <&tegra_car TEGRA20_CLK_PLL_P>;
                        clock-names = "disp1", "parent";
+                       resets = <&tegra_car 27>;
+                       reset-names = "dc";
 
                        rgb {
                                status = "disabled";
@@ -212,6 +269,8 @@ Example:
                        clocks = <&tegra_car TEGRA20_CLK_DISP2>,
                                 <&tegra_car TEGRA20_CLK_PLL_P>;
                        clock-names = "disp2", "parent";
+                       resets = <&tegra_car 26>;
+                       reset-names = "dc";
 
                        rgb {
                                status = "disabled";
@@ -225,6 +284,8 @@ Example:
                        clocks = <&tegra_car TEGRA20_CLK_HDMI>,
                                 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
                        clock-names = "hdmi", "parent";
+                       resets = <&tegra_car 51>;
+                       reset-names = "hdmi";
                        status = "disabled";
                };
 
@@ -242,6 +303,8 @@ Example:
                        clocks = <&tegra_car TEGRA20_CLK_DSI>,
                                 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
                        clock-names = "dsi", "parent";
+                       resets = <&tegra_car 48>;
+                       reset-names = "dsi";
                        status = "disabled";
                };
        };

diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index 173fbaab687bba2cca3808e7622ee003475713d6..10d2afdb76f4964fc46c0f13e0d32a5b012c4e54 100644 (file)
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -47,6 +47,10 @@ Required properties:
   - fast-clk
   Tegra114:
   - div-clk
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - i2c
 
 Example:
 
@@ -58,5 +62,7 @@ Example:
                #size-cells = <0>;
                clocks = <&tegra_car 12>, <&tegra_car 124>;
                clock-names = "div-clk", "fast-clk";
+               resets = <&tegra_car 12>;
+               reset-names = "i2c";
                status = "disabled";
        };

diff --git a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
index 7d5a53dd77d1166c0bfea9af43bcca9a7a0dfd27..0382b8bd69c63b2e821f3a976028384254c81437 100644 (file)
--- a/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
+++ b/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt
@@ -15,6 +15,10 @@ Required properties:
   devicetree/bindings/input/matrix-keymap.txt.
 - clocks: Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - kbc
 
 Optional properties, in addition to those specified by the shared
 matrix-keyboard bindings:
@@ -34,6 +38,8 @@ keyboard: keyboard {
        reg = <0x7000e200 0x100>;
        interrupts = <0 85 0x04>;
        clocks = <&tegra_car 36>;
+       resets = <&tegra_car 36>;
+       reset-names = "kbc";
        nvidia,ghost-filter;
        nvidia,debounce-delay-ms = <640>;
        nvidia,kbc-row-pins = <0 1 2>;    /* pin 0, 1, 2 as rows */

diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index f727902a9e8dbbe9fc3604b9fba2f3019835672d..f357c16ea815c5fc6c3b2d7a8a4c41a9683f60bc 100644 (file)
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -10,6 +10,10 @@ Required properties:
 - compatible : Should be "nvidia,<chip>-sdhci"
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - sdhci
 
 Optional properties:
 - power-gpios : Specify GPIOs for power control
@@ -21,6 +25,8 @@ sdhci@c8000200 {
        reg = <0xc8000200 0x200>;
        interrupts = <47>;
        clocks = <&tegra_car 14>;
+       resets = <&tegra_car 14>;
+       reset-names = "sdhci";
        cd-gpios = <&gpio 69 0>; /* gpio PI5 */
        wp-gpios = <&gpio 57 0>; /* gpio PH1 */
        power-gpios = <&gpio 155 0>; /* gpio PT3 */

diff --git a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
index a97fe575ca29fc6d622d21a1a0388823f4bcb4fc..5ae601e7f51f313a5c0a0f4dbc0095151841a519 100644 (file)
--- a/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
+++ b/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt
@@ -15,3 +15,7 @@ Required properties:
   - fast-clk
   Tegra114:
   - div-clk
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2c

diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 9e22da7393a34724f7456547c4712482c16d7f0c..24cee06915c989cfd6866ad5f3d86e3605cd0ae3 100644 (file)
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -47,9 +47,14 @@ Required properties:
 - clock-names: Must include the following entries:
   - pex
   - afi
-  - pcie_xclk
   - pll_e
   - cml (not required for Tegra20)
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - pex
+  - afi
+  - pcie_x
 
 Root ports are defined as subnodes of the PCIe controller node.
 
@@ -91,9 +96,10 @@ SoC DTSI:
                          0x82000000 0 0xa0000000 0xa0000000 0 0x10000000   /* non-prefetchable memory */
                          0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
 
-               clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
-                        <&tegra_car 118>;
-               clock-names = "pex", "afi", "pcie_xclk", "pll_e";
+               clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 118>;
+               clock-names = "pex", "afi", "pll_e";
+               resets = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>;
+               reset-names = "pex", "afi", "pcie_x";
                status = "disabled";
 
                pci@1,0 {

diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index f28128717dccb53affce73b1a825648402cd025c..c7ea9d4a988b8d78971a96cf585a011ae7274711 100644 (file)
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -9,6 +9,10 @@ Required properties:
   the cells format.
 - clocks: Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - pwm
 
 Example:
 
@@ -17,4 +21,6 @@ Example:
                reg = <0x7000a000 0x100>;
                #pwm-cells = <2>;
                clocks = <&tegra_car 17>;
+               resets = <&tegra_car 17>;
+               reset-names = "pwm";
        };

diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
index 11eb6e71ddd6b1f9d7de63e064b17ec1018b4024..74ebd4c2f99de3bb037e3e813362a93833eb238b 100644 (file)
--- a/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
+++ b/Documentation/devicetree/bindings/serial/nvidia,tegra20-hsuart.txt
@@ -8,6 +8,10 @@ Required properties:
   request selector for this UART controller.
 - clocks: Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - serial
 
 Optional properties:
 - nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable
@@ -23,5 +27,7 @@ serial@70006000 {
        nvidia,dma-request-selector = <&apbdma 8>;
        nvidia,enable-modem-interrupt;
        clocks = <&tegra_car 6>;
+       resets = <&tegra_car 6>;
+       reset-names = "serial";
        status = "disabled";
 };

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
index 37f4ebf5b184f56080ecd7c0ee07317a455e393a..2b6817f6e40e1a19635e8e67ea1649416eb8be60 100644 (file)
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-ac97.txt
@@ -6,6 +6,10 @@ Required properties:
 - interrupts : Should contain AC97 interrupt
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - ac97
 - nvidia,dma-request-selector : The Tegra DMA controller's phandle and
   request selector for the AC97 controller
 - nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
@@ -23,4 +27,6 @@ ac97@70002000 {
        nvidia,codec-reset-gpio = <&gpio 170 0>;
        nvidia,codec-sync-gpio = <&gpio 120 0>;
        clocks = <&tegra_car 3>;
+       resets = <&tegra_car 3>;
+       reset-names = "ac97";
 };

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
index ba0c9452916daa50269cae7c26e21a268d8e7fd2..8b070aeca3db9b9b8eabefbd2f41a61fe10007e0 100644 (file)
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt
@@ -6,6 +6,10 @@ Required properties:
 - interrupts : Should contain I2S interrupt
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2s
 - nvidia,dma-request-selector : The Tegra DMA controller's phandle and
   request selector for this I2S controller
 
@@ -17,4 +21,6 @@ i2s@70002800 {
        interrupts = < 45 >;
        nvidia,dma-request-selector = < &apbdma 2 >;
        clocks = <&tegra_car 11>;
+       resets = <&tegra_car 11>;
+       reset-names = "i2s";
 };

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 7299eeadd58899c32eee8c2ef165a38c00b2f13e..60d59a54ca073dd92b60ffa610f64d7a2c2c66b3 100644 (file)
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -15,6 +15,11 @@ Required properties:
 - clocks : Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
+  - d_audio
+  - apbif
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
   Tegra30 and later:
   - d_audio
   - apbif
@@ -26,7 +31,7 @@ Required properties:
   - dam0
   - dam1
   - dam2
-  - spdif_in
+  - spdif
   Tegra114 and later additionally require:
   - amx
   - adx
@@ -48,13 +53,15 @@ ahub@70080000 {
        reg = <0x70080000 0x200 0x70080200 0x100>;
        interrupts = < 0 103 0x04 >;
        nvidia,dma-request-selector = <&apbdma 1>;
-       clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
+       clocks = <&tegra_car 106>, <&tegra_car 107>;
+       clock-names = "d_audio", "apbif";
+       resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
                <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
                <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
-               <&tegra_car 110>, <&tegra_car 162>;
-       clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
+               <&tegra_car 110>, <&tegra_car 10>;
+       reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                "i2s3", "i2s4", "dam0", "dam1", "dam2",
-               "spdif_in";
+               "spdif";
        ranges;
        #address-cells = <1>;
        #size-cells = <1>;

diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index 7a3112bc135c1bf1c95970a30d3775c0e58a26be..0c113ffe381492627474948aeb3f8357c4693d44 100644 (file)
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -5,6 +5,10 @@ Required properties:
 - reg : Should contain I2S registers location and length
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - i2s
 - nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback)
   first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
 
@@ -15,4 +19,6 @@ i2s@70080300 {
        reg = <0x70080300 0x100>;
        nvidia,ahub-cif-ids = <4 4>;
        clocks = <&tegra_car 11>;
+       resets = <&tegra_car 11>;
+       reset-names = "i2s";
 };

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index d4f2d534934bd337521b220a006f9bd018575bee..fcd9f67999de93dbc21aaf48cd82acc56afae2b4 100644 (file)
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -10,6 +10,10 @@ Required properties:
   See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entries:
   - spi
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -26,5 +30,7 @@ spi@7000d600 {
        #size-cells = <0>;
        clocks = <&tegra_car 44>;
        clock-names = "spi";
+       resets = <&tegra_car 44>;
+       reset-names = "spi";
        status = "disabled";
 };

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
index 66e16c7f5939440b7e425f2d5e52c9f0585ff9db..e144f144717fffc20084f1ee4d482e0eb1c2467e 100644 (file)
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-sflash.txt
@@ -8,6 +8,10 @@ Required properties:
   request selector for this SFLASH controller.
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -24,5 +28,7 @@ spi@7000c380 {
        #address-cells = <1>;
        #size-cells = <0>;
        clocks = <&tegra_car 43>;
+       resets = <&tegra_car 43>;
+       reset-names = "spi";
        status = "disabled";
 };

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
index 0e6e94eb2b2a515cbe6483edac8651b62c59a797..9393e28f444bcc1111df86eced01d6c8fbccc389 100644 (file)
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra20-slink.txt
@@ -8,6 +8,10 @@ Required properties:
   request selector for this SLINK controller.
 - clocks : Must contain one entry, for the module clock.
   See ../clocks/clock-bindings.txt for details.
+- resets : Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names : Must include the following entries:
+  - spi
 
 Recommended properties:
 - spi-max-frequency: Definition as per
@@ -24,5 +28,7 @@ spi@7000d600 {
        #address-cells = <1>;
        #size-cells = <0>;
        clocks = <&tegra_car 44>;
+       resets = <&tegra_car 44>;
+       reset-names = "spi";
        status = "disabled";
 };

diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index b98d0bdfa2483e14ed3b2aceec59e30f5e1edcf5..3dc9140e3dfba6d26f7c43e43d04308134cb543e 100644 (file)
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -10,6 +10,10 @@ Required properties :
  - nvidia,phy : phandle of the PHY that the controller is connected to.
  - clocks : Must contain one entry, for the module clock.
    See ../clocks/clock-bindings.txt for details.
+ - resets : Must contain an entry for each entry in reset-names.
+   See ../reset/reset.txt for details.
+ - reset-names : Must include the following entries:
+   - usb
 
 Optional properties:
  - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20