drm/radeon/hdmi: store info about all AFMT blocks
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 14 May 2012 14:52:29 +0000 (16:52 +0200)
committerDave Airlie <airlied@redhat.com>
Thu, 17 May 2012 11:15:40 +0000 (12:15 +0100)
Introduce special struct radeon_afmt for this purpose.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r600_reg.h
drivers/gpu/drm/radeon/r600d.h
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/radeon/radeon_mode.h

index c44304ad8bdaa77b7f065de85f1ed4668604529f..2b960cb5c18a664a2ecf64b712bea3deeed06b63 100644 (file)
 #define R600_AUDIO_PIN_WIDGET_CNTL        0x73d4
 #define R600_AUDIO_STATUS_BITS            0x73d8
 
+#define DCE2_HDMI_OFFSET0              (0x7400 - 0x7400)
+#define DCE2_HDMI_OFFSET1              (0x7700 - 0x7400)
+/* DCE3.2 second instance starts at 0x7800 */
+#define DCE3_HDMI_OFFSET0              (0x7400 - 0x7400)
+#define DCE3_HDMI_OFFSET1              (0x7800 - 0x7400)
+
 #endif
index a9652be93b6688a25fa5df257f46dc9e2866f853..15bd3b216243c2207777d4ab20cb2e0fe091a232 100644 (file)
 #       define AFMT_AZ_FORMAT_WTRIG_ACK      (1 << 29)
 #       define AFMT_AZ_AUDIO_ENABLE_CHG_ACK  (1 << 30)
 
-#define DCE2_HDMI_OFFSET0              (0x7400 - 0x7400)
-#define DCE2_HDMI_OFFSET1              (0x7700 - 0x7400)
-/* DCE3.2 second instance starts at 0x7800 */
-#define DCE3_HDMI_OFFSET0              (0x7400 - 0x7400)
-#define DCE3_HDMI_OFFSET1              (0x7800 - 0x7400)
-
 /*
  * PM4
  */
index 05a4e15f54657b916e6117f4c782de98221dcc98..ef9ccb4def4d213e8ee8c4752e98a8f1e8b25c47 100644 (file)
@@ -364,7 +364,6 @@ int r600_audio_rate(struct radeon_device *rdev);
 uint8_t r600_audio_status_bits(struct radeon_device *rdev);
 uint8_t r600_audio_category_code(struct radeon_device *rdev);
 void r600_audio_fini(struct radeon_device *rdev);
-void r600_hdmi_init(struct drm_encoder *encoder);
 int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
 void r600_hdmi_update_audio_settings(struct drm_encoder *encoder);
 /* r600 blit */
index 0c6d63bf6f95d68a8b51d4ffc09566f5116f623f..da3fe8a68f8d63ba958f1b226c3d763821740808 100644 (file)
@@ -1225,6 +1225,93 @@ void radeon_update_display_priority(struct radeon_device *rdev)
 
 }
 
+/*
+ * Allocate hdmi structs and determine register offsets
+ */
+static void radeon_afmt_init(struct radeon_device *rdev)
+{
+       int i;
+
+       for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++)
+               rdev->mode_info.afmt[i] = NULL;
+
+       if (ASIC_IS_DCE6(rdev)) {
+               /* todo */
+       } else if (ASIC_IS_DCE4(rdev)) {
+               /* DCE4/5 has 6 audio blocks tied to DIG encoders */
+               /* DCE4.1 has 2 audio blocks tied to DIG encoders */
+               rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+               if (rdev->mode_info.afmt[0]) {
+                       rdev->mode_info.afmt[0]->offset = EVERGREEN_CRTC0_REGISTER_OFFSET;
+                       rdev->mode_info.afmt[0]->id = 0;
+               }
+               rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+               if (rdev->mode_info.afmt[1]) {
+                       rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
+                       rdev->mode_info.afmt[1]->id = 1;
+               }
+               if (!ASIC_IS_DCE41(rdev)) {
+                       rdev->mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                       if (rdev->mode_info.afmt[2]) {
+                               rdev->mode_info.afmt[2]->offset = EVERGREEN_CRTC2_REGISTER_OFFSET;
+                               rdev->mode_info.afmt[2]->id = 2;
+                       }
+                       rdev->mode_info.afmt[3] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                       if (rdev->mode_info.afmt[3]) {
+                               rdev->mode_info.afmt[3]->offset = EVERGREEN_CRTC3_REGISTER_OFFSET;
+                               rdev->mode_info.afmt[3]->id = 3;
+                       }
+                       rdev->mode_info.afmt[4] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                       if (rdev->mode_info.afmt[4]) {
+                               rdev->mode_info.afmt[4]->offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
+                               rdev->mode_info.afmt[4]->id = 4;
+                       }
+                       rdev->mode_info.afmt[5] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                       if (rdev->mode_info.afmt[5]) {
+                               rdev->mode_info.afmt[5]->offset = EVERGREEN_CRTC5_REGISTER_OFFSET;
+                               rdev->mode_info.afmt[5]->id = 5;
+                       }
+               }
+       } else if (ASIC_IS_DCE3(rdev)) {
+               /* DCE3.x has 2 audio blocks tied to DIG encoders */
+               rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+               if (rdev->mode_info.afmt[0]) {
+                       rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0;
+                       rdev->mode_info.afmt[0]->id = 0;
+               }
+               rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+               if (rdev->mode_info.afmt[1]) {
+                       rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1;
+                       rdev->mode_info.afmt[1]->id = 1;
+               }
+       } else if (ASIC_IS_DCE2(rdev)) {
+               /* DCE2 has at least 1 routable audio block */
+               rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+               if (rdev->mode_info.afmt[0]) {
+                       rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0;
+                       rdev->mode_info.afmt[0]->id = 0;
+               }
+               /* r6xx has 2 routable audio blocks */
+               if (rdev->family >= CHIP_R600) {
+                       rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                       if (rdev->mode_info.afmt[1]) {
+                               rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1;
+                               rdev->mode_info.afmt[1]->id = 1;
+                       }
+               }
+       }
+}
+
+static void radeon_afmt_fini(struct radeon_device *rdev)
+{
+       int i;
+
+       for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++) {
+               kfree(rdev->mode_info.afmt[i]);
+               rdev->mode_info.afmt[i] = NULL;
+       }
+}
+
 int radeon_modeset_init(struct radeon_device *rdev)
 {
        int i;
@@ -1285,6 +1372,9 @@ int radeon_modeset_init(struct radeon_device *rdev)
        /* initialize hpd */
        radeon_hpd_init(rdev);
 
+       /* setup afmt */
+       radeon_afmt_init(rdev);
+
        /* Initialize power management */
        radeon_pm_init(rdev);
 
@@ -1301,6 +1391,7 @@ void radeon_modeset_fini(struct radeon_device *rdev)
        radeon_pm_fini(rdev);
 
        if (rdev->mode_info.mode_config_initialized) {
+               radeon_afmt_fini(rdev);
                drm_kms_helper_poll_fini(rdev->ddev);
                radeon_hpd_fini(rdev);
                drm_mode_config_cleanup(rdev->ddev);
index 499a5fed8b2629def9458dacef5b2dde680c3fef..9583e953d30b0ba5ce70ec03cb7fbdbeb00d5d39 100644 (file)
@@ -220,12 +220,20 @@ enum radeon_dvo_chip {
 
 struct radeon_fbdev;
 
+struct radeon_afmt {
+       bool enabled;
+       int offset;
+       bool last_buffer_filled_status;
+       int id;
+};
+
 struct radeon_mode_info {
        struct atom_context *atom_context;
        struct card_info *atom_card_info;
        enum radeon_connector_table connector_table;
        bool mode_config_initialized;
        struct radeon_crtc *crtcs[6];
+       struct radeon_afmt *afmt[6];
        /* DVI-I properties */
        struct drm_property *coherent_mode_property;
        /* DAC enable load detect */
@@ -364,6 +372,7 @@ struct radeon_encoder_atom_dig {
        int dpms_mode;
        uint8_t backlight_level;
        int panel_mode;
+       struct radeon_afmt *afmt;
 };
 
 struct radeon_encoder_atom_dac {