drivers: PL011: replace UART_MIS reading with _RIS & _IMSC

The PL011 register UART_MIS is actually a bitwise AND of the
UART_RIS and the UART_MISC register.
Since the SBSA UART does not include the _MIS register, use the
two separate registers to get the same behaviour. Since we are
inside the spinlock and we read the _IMSC register only once, there
should be no race issue.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Naresh Bhat <nbhat@cavium.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index 38d2245d7485ebbe4f3eba437780565575a5ed0c..b66636bf06a021261783f632eec23abfea60c8ea 100644 (file)
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -1322,11 +1322,13 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
        struct uart_amba_port *uap = dev_id;
        unsigned long flags;
        unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
+       u16 imsc;
        int handled = 0;
        unsigned int dummy_read;
 
        spin_lock_irqsave(&uap->port.lock, flags);
-       status = readw(uap->port.membase + UART011_MIS);
+       imsc = readw(uap->port.membase + UART011_IMSC);
+       status = readw(uap->port.membase + UART011_RIS) & imsc;
        if (status) {
                do {
                        if (uap->vendor->cts_event_workaround) {
@@ -1361,7 +1363,7 @@ static irqreturn_t pl011_int(int irq, void *dev_id)
                        if (pass_counter-- == 0)
                                break;
 
-                       status = readw(uap->port.membase + UART011_MIS);
+                       status = readw(uap->port.membase + UART011_RIS) & imsc;
                } while (status != 0);
                handled = 1;
        }