/* Read the EEPROM for information regarding LED behavior. Refer to
* ET1310_phy.c, et131x_xcvr_init(), for its use.
*/
- eeprom_read(etdev, 0x70, &etdev->eepromData[0]);
- eeprom_read(etdev, 0x71, &etdev->eepromData[1]);
+ eeprom_read(etdev, 0x70, &etdev->eeprom_data[0]);
+ eeprom_read(etdev, 0x71, &etdev->eeprom_data[1]);
- if (etdev->eepromData[0] != 0xcd)
+ if (etdev->eeprom_data[0] != 0xcd)
/* Disable all optional features */
- etdev->eepromData[1] = 0x00;
+ etdev->eeprom_data[1] = 0x00;
return 0;
}
* station address is used for generating and checking pause control
* packets.
*/
- station2.bits.Octet1 = etdev->CurrentAddress[0];
- station2.bits.Octet2 = etdev->CurrentAddress[1];
- station1.bits.Octet3 = etdev->CurrentAddress[2];
- station1.bits.Octet4 = etdev->CurrentAddress[3];
- station1.bits.Octet5 = etdev->CurrentAddress[4];
- station1.bits.Octet6 = etdev->CurrentAddress[5];
+ station2.bits.Octet1 = etdev->addr[0];
+ station2.bits.Octet2 = etdev->addr[1];
+ station1.bits.Octet3 = etdev->addr[2];
+ station1.bits.Octet4 = etdev->addr[3];
+ station1.bits.Octet5 = etdev->addr[4];
+ station1.bits.Octet6 = etdev->addr[5];
writel(station1.value, &pMac->station_addr_1.value);
writel(station2.value, &pMac->station_addr_2.value);
writel(0, &pRxMac->mask4_word3);
/* Lets setup the WOL Source Address */
- sa_lo.bits.sa3 = etdev->CurrentAddress[2];
- sa_lo.bits.sa4 = etdev->CurrentAddress[3];
- sa_lo.bits.sa5 = etdev->CurrentAddress[4];
- sa_lo.bits.sa6 = etdev->CurrentAddress[5];
+ sa_lo.bits.sa3 = etdev->addr[2];
+ sa_lo.bits.sa4 = etdev->addr[3];
+ sa_lo.bits.sa5 = etdev->addr[4];
+ sa_lo.bits.sa6 = etdev->addr[5];
writel(sa_lo.value, &pRxMac->sa_lo.value);
- sa_hi.bits.sa1 = etdev->CurrentAddress[0];
- sa_hi.bits.sa2 = etdev->CurrentAddress[1];
+ sa_hi.bits.sa1 = etdev->addr[0];
+ sa_hi.bits.sa2 = etdev->addr[1];
writel(sa_hi.value, &pRxMac->sa_hi.value);
/* Disable all Packet Filtering */
* Set up unicast packet filter reg 3 to be the octets 2 - 5 of the
* MAC address for first address
*/
- uni_pf3.bits.addr1_1 = etdev->CurrentAddress[0];
- uni_pf3.bits.addr1_2 = etdev->CurrentAddress[1];
- uni_pf3.bits.addr2_1 = etdev->CurrentAddress[0];
- uni_pf3.bits.addr2_2 = etdev->CurrentAddress[1];
-
- uni_pf2.bits.addr2_3 = etdev->CurrentAddress[2];
- uni_pf2.bits.addr2_4 = etdev->CurrentAddress[3];
- uni_pf2.bits.addr2_5 = etdev->CurrentAddress[4];
- uni_pf2.bits.addr2_6 = etdev->CurrentAddress[5];
-
- uni_pf1.bits.addr1_3 = etdev->CurrentAddress[2];
- uni_pf1.bits.addr1_4 = etdev->CurrentAddress[3];
- uni_pf1.bits.addr1_5 = etdev->CurrentAddress[4];
- uni_pf1.bits.addr1_6 = etdev->CurrentAddress[5];
+ uni_pf3.bits.addr1_1 = etdev->addr[0];
+ uni_pf3.bits.addr1_2 = etdev->addr[1];
+ uni_pf3.bits.addr2_1 = etdev->addr[0];
+ uni_pf3.bits.addr2_2 = etdev->addr[1];
+
+ uni_pf2.bits.addr2_3 = etdev->addr[2];
+ uni_pf2.bits.addr2_4 = etdev->addr[3];
+ uni_pf2.bits.addr2_5 = etdev->addr[4];
+ uni_pf2.bits.addr2_6 = etdev->addr[5];
+
+ uni_pf1.bits.addr1_3 = etdev->addr[2];
+ uni_pf1.bits.addr1_4 = etdev->addr[3];
+ uni_pf1.bits.addr1_5 = etdev->addr[4];
+ uni_pf1.bits.addr1_6 = etdev->addr[5];
pm_csr = readl(&etdev->regs->global.pm_csr);
if ((pm_csr & ET_PM_PHY_SW_COMA) == 0) {
* vendors; The LED behavior is now determined by vendor data in the
* EEPROM. However, the above description is the default.
*/
- if ((etdev->eepromData[1] & 0x4) == 0) {
+ if ((etdev->eeprom_data[1] & 0x4) == 0) {
MiRead(etdev, (u8) offsetof(MI_REGS_t, lcr2),
&lcr2.value);
- if ((etdev->eepromData[1] & 0x8) == 0)
+ if ((etdev->eeprom_data[1] & 0x8) == 0)
lcr2.bits.led_tx_rx = 0x3;
else
lcr2.bits.led_tx_rx = 0x4;
void EnablePhyComa(struct et131x_adapter *etdev)
{
unsigned long flags;
- u32 GlobalPmCSR;
+ u32 pmcsr;
- GlobalPmCSR = readl(&etdev->regs->global.pm_csr);
+ pmcsr = readl(&etdev->regs->global.pm_csr);
/* Save the GbE PHY speed and duplex modes. Need to restore this
* when cable is plugged back in
etdev->PoMgmt.PowerDownDuplex = etdev->AiForceDpx;
/* Stop sending packets. */
- spin_lock_irqsave(&etdev->SendHWLock, flags);
+ spin_lock_irqsave(&etdev->send_hw_lock, flags);
etdev->Flags |= fMP_ADAPTER_LOWER_POWER;
- spin_unlock_irqrestore(&etdev->SendHWLock, flags);
+ spin_unlock_irqrestore(&etdev->send_hw_lock, flags);
/* Wait for outstanding Receive packets */
/* Gate off JAGCore 3 clock domains */
- GlobalPmCSR &= ~ET_PMCSR_INIT;
- writel(GlobalPmCSR, &etdev->regs->global.pm_csr);
+ pmcsr &= ~ET_PMCSR_INIT;
+ writel(pmcsr, &etdev->regs->global.pm_csr);
/* Program gigE PHY in to Coma mode */
- GlobalPmCSR |= ET_PM_PHY_SW_COMA;
- writel(GlobalPmCSR, &etdev->regs->global.pm_csr);
+ pmcsr |= ET_PM_PHY_SW_COMA;
+ writel(pmcsr, &etdev->regs->global.pm_csr);
}
/**
*/
void DisablePhyComa(struct et131x_adapter *etdev)
{
- u32 GlobalPmCSR;
+ u32 pmcsr;
- GlobalPmCSR = readl(&etdev->regs->global.pm_csr);
+ pmcsr = readl(&etdev->regs->global.pm_csr);
/* Disable phy_sw_coma register and re-enable JAGCore clocks */
- GlobalPmCSR |= ET_PMCSR_INIT;
- GlobalPmCSR &= ~ET_PM_PHY_SW_COMA;
- writel(GlobalPmCSR, &etdev->regs->global.pm_csr);
+ pmcsr |= ET_PMCSR_INIT;
+ pmcsr &= ~ET_PM_PHY_SW_COMA;
+ writel(pmcsr, &etdev->regs->global.pm_csr);
/* Restore the GbE PHY speed and duplex modes;
* Reset JAGCore; re-configure and initialize JAGCore and gigE PHY
writel((psr_num_des * LO_MARK_PERCENT_FOR_PSR) / 100,
&rx_dma->psr_min_des);
- spin_lock_irqsave(&etdev->RcvLock, flags);
+ spin_lock_irqsave(&etdev->rcv_lock, flags);
/* These local variables track the PSR in the adapter structure */
rx_local->local_psr_full = 0;
*/
writel(PARM_RX_TIME_INT_DEF, &rx_dma->max_pkt_time);
- spin_unlock_irqrestore(&etdev->RcvLock, flags);
+ spin_unlock_irqrestore(&etdev->rcv_lock, flags);
}
/**
}
/* Get and fill the RFD. */
- spin_lock_irqsave(&etdev->RcvLock, flags);
+ spin_lock_irqsave(&etdev->rcv_lock, flags);
rfd = NULL;
element = rx_local->RecvList.next;
rfd = (PMP_RFD) list_entry(element, MP_RFD, list_node);
if (rfd == NULL) {
- spin_unlock_irqrestore(&etdev->RcvLock, flags);
+ spin_unlock_irqrestore(&etdev->rcv_lock, flags);
return NULL;
}
list_del(&rfd->list_node);
rx_local->nReadyRecv--;
- spin_unlock_irqrestore(&etdev->RcvLock, flags);
+ spin_unlock_irqrestore(&etdev->rcv_lock, flags);
rfd->bufferindex = bindex;
rfd->ringindex = rindex;
if (etdev->ReplicaPhyLoopbk == 1) {
buf = rx_local->fbr[rindex]->virt[bindex];
- if (memcmp(&buf[6], &etdev->CurrentAddress[0],
- ETH_ALEN) == 0) {
+ if (memcmp(&buf[6], etdev->addr, ETH_ALEN) == 0) {
if (memcmp(&buf[42], "Replica packet",
ETH_HLEN)) {
etdev->ReplicaPhyLoopbkPF = 1;
/* The processing on this RFD is done, so put it back on the tail of
* our list
*/
- spin_lock_irqsave(&etdev->RcvLock, flags);
+ spin_lock_irqsave(&etdev->rcv_lock, flags);
list_add_tail(&rfd->list_node, &rx_local->RecvList);
rx_local->nReadyRecv++;
- spin_unlock_irqrestore(&etdev->RcvLock, flags);
+ spin_unlock_irqrestore(&etdev->rcv_lock, flags);
WARN_ON(rx_local->nReadyRecv > rx_local->NumRfd);
}
u32 HwErrCount;
/* Configuration */
- u8 PermanentAddress[ETH_ALEN];
- u8 CurrentAddress[ETH_ALEN];
+ u8 rom_addr[ETH_ALEN];
+ u8 addr[ETH_ALEN];
bool has_eeprom;
- u8 eepromData[2];
+ u8 eeprom_data[2];
/* Spinlocks */
spinlock_t Lock;
spinlock_t TCBSendQLock;
spinlock_t TCBReadyQLock;
- spinlock_t SendHWLock;
+ spinlock_t send_hw_lock;
spinlock_t RcvLock;
spinlock_t RcvPendLock;
* EEPROM then we need to generate the last octet and set it on the
* device
*/
- if (adapter->PermanentAddress[0] == 0x00 &&
- adapter->PermanentAddress[1] == 0x00 &&
- adapter->PermanentAddress[2] == 0x00 &&
- adapter->PermanentAddress[3] == 0x00 &&
- adapter->PermanentAddress[4] == 0x00 &&
- adapter->PermanentAddress[5] == 0x00) {
+ if (adapter->rom_addr[0] == 0x00 &&
+ adapter->rom_addr[1] == 0x00 &&
+ adapter->rom_addr[2] == 0x00 &&
+ adapter->rom_addr[3] == 0x00 &&
+ adapter->rom_addr[4] == 0x00 &&
+ adapter->rom_addr[5] == 0x00) {
/*
* We need to randomly generate the last octet so we
* decrease our chances of setting the mac address to
* same as another one of our cards in the system
*/
- get_random_bytes(&adapter->CurrentAddress[5], 1);
+ get_random_bytes(&adapter->addr[5], 1);
/*
* We have the default value in the register we are
* working with so we need to copy the current
* address into the permanent address
*/
- memcpy(adapter->PermanentAddress,
- adapter->CurrentAddress, ETH_ALEN);
+ memcpy(adapter->rom_addr,
+ adapter->addr, ETH_ALEN);
} else {
/* We do not have an override address, so set the
* current address to the permanent address and add
* it to the device
*/
- memcpy(adapter->CurrentAddress,
- adapter->PermanentAddress, ETH_ALEN);
+ memcpy(adapter->addr,
+ adapter->rom_addr, ETH_ALEN);
}
}
max_payload &= 0x07; /* Only the lower 3 bits are valid */
if (max_payload < 2) {
- static const u16 AckNak[2] = { 0x76, 0xD0 };
- static const u16 Replay[2] = { 0x1E0, 0x2ED };
+ static const u16 acknak[2] = { 0x76, 0xD0 };
+ static const u16 replay[2] = { 0x1E0, 0x2ED };
if (pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
- AckNak[max_payload])) {
+ acknak[max_payload])) {
dev_err(&pdev->dev,
"Could not write PCI config space for ACK/NAK\n");
return -EIO;
}
if (pci_write_config_word(pdev, ET1310_PCI_REPLAY,
- Replay[max_payload])) {
+ replay[max_payload])) {
dev_err(&pdev->dev,
"Could not write PCI config space for Replay Timer\n");
return -EIO;
for (i = 0; i < ETH_ALEN; i++) {
if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
- adapter->PermanentAddress + i)) {
+ adapter->rom_addr + i)) {
dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n");
return -EIO;
}
}
- memcpy(adapter->CurrentAddress, adapter->PermanentAddress, ETH_ALEN);
+ memcpy(adapter->addr, adapter->rom_addr, ETH_ALEN);
return 0;
}
spin_lock_init(&etdev->Lock);
spin_lock_init(&etdev->TCBSendQLock);
spin_lock_init(&etdev->TCBReadyQLock);
- spin_lock_init(&etdev->SendHWLock);
- spin_lock_init(&etdev->RcvLock);
+ spin_lock_init(&etdev->send_hw_lock);
+ spin_lock_init(&etdev->rcv_lock);
spin_lock_init(&etdev->RcvPendLock);
spin_lock_init(&etdev->FbrLock);
spin_lock_init(&etdev->PHYLock);
etdev->RegistryJumboPacket = 1514; /* 1514-9216 */
/* Set the MAC address to a default */
- memcpy(etdev->CurrentAddress, default_mac, ETH_ALEN);
+ memcpy(etdev->addr, default_mac, ETH_ALEN);
/* Decode SpeedDuplex
*
INIT_WORK(&adapter->task, et131x_isr_handler);
/* Copy address into the net_device struct */
- memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
+ memcpy(netdev->dev_addr, adapter->addr, ETH_ALEN);
/* Setup et1310 as per the documentation */
et131x_adapter_setup(adapter);
et131x_init_send(adapter);
et131x_hwaddr_init(adapter);
- memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
+ memcpy(netdev->dev_addr, adapter->addr, ETH_ALEN);
/* Init the device with the new settings */
et131x_adapter_setup(adapter);