ASoC: Intel: Skylake: Update pcm capability
authorJeeja KP <jeeja.kp@intel.com>
Mon, 23 Nov 2015 16:56:26 +0000 (22:26 +0530)
committerMark Brown <broonie@kernel.org>
Wed, 25 Nov 2015 17:55:41 +0000 (17:55 +0000)
This patch adds pcm capability to support 16/8k rates and 32 bit formats

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/skl-pcm.c

index 3c891d78ba582a8ff8cb3411c3d704b9ea80ad7e..c79bbff00cb72e81801e977511627dc095a630f0 100644 (file)
@@ -39,9 +39,12 @@ static struct snd_pcm_hardware azx_pcm_hw = {
                                 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
                                 SNDRV_PCM_INFO_HAS_LINK_ATIME |
                                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
-       .formats =              SNDRV_PCM_FMTBIT_S16_LE,
-       .rates =                SNDRV_PCM_RATE_48000,
-       .rate_min =             48000,
+       .formats =              SNDRV_PCM_FMTBIT_S16_LE |
+                               SNDRV_PCM_FMTBIT_S32_LE |
+                               SNDRV_PCM_FMTBIT_S24_LE,
+       .rates =                SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
+                               SNDRV_PCM_RATE_8000,
+       .rate_min =             8000,
        .rate_max =             48000,
        .channels_min =         2,
        .channels_max =         2,