#define roundedDiv(num, denom) ((2 * (num) + (denom)) / (2 * (denom)))
#define MHz(x) ((x) * 1000000)
-logical_chip_type_t getChipType(void)
+logical_chip_type_t sm750_get_chip_type(void)
{
unsigned short physicalID;
char physicalRev;
unsigned int pll_reg;
unsigned int M, N, OD, POD;
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return MHz(130);
pll_reg = PEEK32(MXCLK_PLL_CTRL);
unsigned int ulActualMxClk;
/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return;
if (frequency) {
/* Cheok_0509: For SM750LE, the memory clock is fixed.
* Nothing to set.
*/
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return;
if (frequency) {
/* Cheok_0509: For SM750LE, the memory clock is fixed.
* Nothing to set.
*/
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return;
if (frequency) {
unsigned int data;
/* sm750le only use 64 mb memory*/
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return SZ_64M;
/* for 750,always use power mode0*/
reg |= (CURRENT_GATE_DISPLAY | CURRENT_GATE_LOCALMEM);
setCurrentGate(reg);
- if (getChipType() != SM750LE) {
+ if (sm750_get_chip_type() != SM750LE) {
/* set panel pll and graphic mode via mmio_88 */
reg = PEEK32(VGA_CONFIGURATION);
reg |= (VGA_CONFIGURATION_PLL | VGA_CONFIGURATION_MODE);
const int max_OD = 3;
int max_d = 6;
- if (getChipType() == SM750LE) {
+ if (sm750_get_chip_type() == SM750LE) {
/* SM750LE don't have
* programmable PLL and M/N values to work on.
* Just return the requested clock.
}
initchip_param_t;
-logical_chip_type_t getChipType(void);
+logical_chip_type_t sm750_get_chip_type(void);
unsigned int calcPllValue(unsigned int request, pll_value_t *pll);
unsigned int formatPllReg(pll_value_t *pPLL);
void ddk750_set_mmio(void __iomem *, unsigned short, char);
if (pModeParam->horizontal_sync_polarity)
tmp |= DISPLAY_CTRL_HSYNC_PHASE;
- if (getChipType() == SM750LE) {
+ if (sm750_get_chip_type() == SM750LE) {
displayControlAdjust_SM750LE(pModeParam, tmp);
} else {
reg = PEEK32(CRT_DISPLAY_CTRL) &
pll.clockType = clock;
uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
- if (getChipType() == SM750LE) {
+ if (sm750_get_chip_type() == SM750LE) {
/* set graphic mode via IO method */
outb_p(0x88, 0x3d4);
outb_p(0x06, 0x3d5);
{
unsigned int value;
- if (getChipType() == SM750LE) {
+ if (sm750_get_chip_type() == SM750LE) {
value = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_DPMS_MASK;
value |= (state << CRT_DISPLAY_CTRL_DPMS_SHIFT);
POKE32(CRT_DISPLAY_CTRL, value);
static unsigned int getPowerMode(void)
{
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return 0;
return PEEK32(POWER_MODE_CTRL) & POWER_MODE_CTRL_MODE_MASK;
}
control_value = PEEK32(POWER_MODE_CTRL) & ~POWER_MODE_CTRL_MODE_MASK;
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return;
switch (powerMode) {
if ((clk_gpio > 31) || (data_gpio > 31))
return -1;
- if (getChipType() == SM750LE)
+ if (sm750_get_chip_type() == SM750LE)
return sm750le_i2c_init(clk_gpio, data_gpio);
/* Initialize the GPIO pin for the i2c Clock Register */
parm = &sm750_dev->initParm;
if (parm->chip_clk == 0)
- parm->chip_clk = (getChipType() == SM750LE) ?
+ parm->chip_clk = (sm750_get_chip_type() == SM750LE) ?
DEFAULT_SM750LE_CHIP_CLOCK :
DEFAULT_SM750_CHIP_CLOCK;
PEEK32(SYSTEM_CTRL) | SYSTEM_CTRL_PCI_BURST);
}
- if (getChipType() != SM750LE) {
+ if (sm750_get_chip_type() != SM750LE) {
unsigned int val;
/* does user need CRT? */
if (sm750_dev->nocrt) {
dispSet = 0;
channel = *output->channel;
- if (getChipType() != SM750LE) {
+ if (sm750_get_chip_type() != SM750LE) {
if (channel == sm750_primary) {
pr_info("primary channel\n");
if (output->paths & sm750_panel)
enable2DEngine(1);
- if (getChipType() == SM750LE) {
+ if (sm750_get_chip_type() == SM750LE) {
reg = PEEK32(DE_STATE1);
reg |= DE_STATE1_DE_ABORT;
POKE32(DE_STATE1, reg);