Commit
d760fc37b0f74502b3f748951f22c6683b079a8e caused
1G functions to allocate rx rings which were 1/10 of the
size of 10G functions' rx rings.
However, it also caused 10G functions on 5771x boards to
allocate small rings, which limits their possible (default)
rx throughput. This patch causes all 10G functions to use
rings of intended length by default.
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Ariel Elior <ariele@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
} else
#endif
if (!bp->rx_ring_size) {
- u32 cfg = SHMEM_RD(bp,
- dev_info.port_hw_config[BP_PORT(bp)].default_cfg);
-
rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
- /* Dercease ring size for 1G functions */
- if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
- PORT_HW_CFG_NET_SERDES_IF_SGMII)
- rx_ring_size /= 10;
+ if (CHIP_IS_E3(bp)) {
+ u32 cfg = SHMEM_RD(bp,
+ dev_info.port_hw_config[BP_PORT(bp)].
+ default_cfg);
+
+ /* Decrease ring size for 1G functions */
+ if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
+ PORT_HW_CFG_NET_SERDES_IF_SGMII)
+ rx_ring_size /= 10;
+ }
/* allocate at least number of buffers required by FW */
rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :