drm/radeon/kms: fix regression rendering issue on R6XX/R7XX
authorJerome Glisse <jglisse@redhat.com>
Thu, 4 Feb 2010 19:36:39 +0000 (20:36 +0100)
committerDave Airlie <airlied@redhat.com>
Fri, 5 Feb 2010 01:43:51 +0000 (11:43 +1000)
It seems that some R6XX/R7XX silently ignore HDP flush when
programmed through ring, this patch addback an ioctl callback
to allow R6XX/R7XX hw to perform such flush through MMIO in
order to fix a regression. For more details see:

http://bugzilla.kernel.org/show_bug.cgi?id=15186

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/radeon_gem.c

index 8c94040cb7f2cde047f73bd282ecac25dfbc50e7..45d565bae71b3da7e4f2f5c4c6c2c3e72196b7bf 100644 (file)
@@ -2900,3 +2900,18 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
        return 0;
 #endif
 }
+
+/**
+ * r600_ioctl_wait_idle - flush host path cache on wait idle ioctl
+ * rdev: radeon device structure
+ * bo: buffer object struct which userspace is waiting for idle
+ *
+ * Some R6XX/R7XX doesn't seems to take into account HDP flush performed
+ * through ring buffer, this leads to corruption in rendering, see
+ * http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we
+ * directly perform HDP flush by writing register through MMIO.
+ */
+void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
+{
+       WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
+}
index 2d5f2bfa72016ccccacec110019b59dd9cc51ed2..37150fc406b579e7bdbb26e3934bab184f988ceb 100644 (file)
@@ -661,6 +661,13 @@ struct radeon_asic {
        void (*hpd_fini)(struct radeon_device *rdev);
        bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
        void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+       /* ioctl hw specific callback. Some hw might want to perform special
+        * operation on specific ioctl. For instance on wait idle some hw
+        * might want to perform and HDP flush through MMIO as it seems that
+        * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
+        * through ring.
+        */
+       void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
 };
 
 /*
index f2fbd2e4e9df59479660f26811d04a92b8955b95..05ee1aeac3fdce21cd72f3735c156be2c0ab2198 100644 (file)
@@ -117,6 +117,7 @@ static struct radeon_asic r100_asic = {
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
        .hpd_set_polarity = &r100_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -176,6 +177,7 @@ static struct radeon_asic r300_asic = {
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
        .hpd_set_polarity = &r100_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 /*
@@ -219,6 +221,7 @@ static struct radeon_asic r420_asic = {
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
        .hpd_set_polarity = &r100_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -267,6 +270,7 @@ static struct radeon_asic rs400_asic = {
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
        .hpd_set_polarity = &r100_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -323,6 +327,7 @@ static struct radeon_asic rs600_asic = {
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
        .hpd_set_polarity = &rs600_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -370,6 +375,7 @@ static struct radeon_asic rs690_asic = {
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
        .hpd_set_polarity = &rs600_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -421,6 +427,7 @@ static struct radeon_asic rv515_asic = {
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
        .hpd_set_polarity = &rs600_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 
@@ -463,6 +470,7 @@ static struct radeon_asic r520_asic = {
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
        .hpd_set_polarity = &rs600_hpd_set_polarity,
+       .ioctl_wait_idle = NULL,
 };
 
 /*
@@ -504,6 +512,7 @@ void r600_hpd_fini(struct radeon_device *rdev);
 bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
 void r600_hpd_set_polarity(struct radeon_device *rdev,
                           enum radeon_hpd_id hpd);
+extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo);
 
 static struct radeon_asic r600_asic = {
        .init = &r600_init,
@@ -538,6 +547,7 @@ static struct radeon_asic r600_asic = {
        .hpd_fini = &r600_hpd_fini,
        .hpd_sense = &r600_hpd_sense,
        .hpd_set_polarity = &r600_hpd_set_polarity,
+       .ioctl_wait_idle = r600_ioctl_wait_idle,
 };
 
 /*
@@ -582,6 +592,7 @@ static struct radeon_asic rv770_asic = {
        .hpd_fini = &r600_hpd_fini,
        .hpd_sense = &r600_hpd_sense,
        .hpd_set_polarity = &r600_hpd_set_polarity,
+       .ioctl_wait_idle = r600_ioctl_wait_idle,
 };
 
 #endif
index 0e1325e1853464d4e46552a2a6cfd523d406e4e6..db8e9a355a01624c32c16bb3ac002b90c97277b3 100644 (file)
@@ -308,6 +308,9 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
        }
        robj = gobj->driver_private;
        r = radeon_bo_wait(robj, NULL, false);
+       /* callback hw specific functions if any */
+       if (robj->rdev->asic->ioctl_wait_idle)
+               robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
        mutex_lock(&dev->struct_mutex);
        drm_gem_object_unreference(gobj);
        mutex_unlock(&dev->struct_mutex);