return r;
}
+void amdgpu_gtt_mgr_print(struct seq_file *m, struct ttm_mem_type_manager *man)
+{
+ struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
+ struct amdgpu_gtt_mgr *mgr = man->priv;
+
+ seq_printf(m, "man size:%llu pages, gtt available:%llu pages, usage:%lluMB\n",
+ man->size, mgr->available, (u64)atomic64_read(&adev->gtt_usage) >> 20);
+
+}
/**
* amdgpu_gtt_mgr_new - allocate a new node
*
#if defined(CONFIG_DEBUG_FS)
+extern void amdgpu_gtt_mgr_print(struct seq_file *m, struct ttm_mem_type_manager
+ *man);
static int amdgpu_mm_dump_table(struct seq_file *m, void *data)
{
struct drm_info_node *node = (struct drm_info_node *)m->private;
spin_lock(&glob->lru_lock);
drm_mm_print(mm, &p);
spin_unlock(&glob->lru_lock);
- if (ttm_pl == TTM_PL_VRAM)
+ switch (ttm_pl) {
+ case TTM_PL_VRAM:
seq_printf(m, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n",
adev->mman.bdev.man[ttm_pl].size,
(u64)atomic64_read(&adev->vram_usage) >> 20,
(u64)atomic64_read(&adev->vram_vis_usage) >> 20);
+ break;
+ case TTM_PL_TT:
+ amdgpu_gtt_mgr_print(m, &adev->mman.bdev.man[TTM_PL_TT]);
+ break;
+ }
return 0;
}