mfd: tps65910: Fix wrong ack_base register
authorKim, Milo <Milo.Kim@ti.com>
Thu, 29 Nov 2012 06:42:12 +0000 (06:42 +0000)
committerSamuel Ortiz <sameo@linux.intel.com>
Fri, 30 Nov 2012 11:20:48 +0000 (12:20 +0100)
The interrupt status registers of TPS65910/1 should be cleared
when the associated interrupt event occurs.
This work is done in the regmap irq thread - using 'ack_base' register.
The ACK registers should be fixed as status register, not mask registers.

This patch fixes the infinite interrupt event problem by clearing
interrupt status registers.

Tested on the AM3517 Craneboard.

Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/tps65910.c

index c160c2d76f79549902212640c3f3d76383e6de23..d5ef3a5b16b1c30be7d8181f203e29174aeb3ac2 100644 (file)
@@ -211,7 +211,7 @@ static struct regmap_irq_chip tps65911_irq_chip = {
        .irq_reg_stride = 2,
        .status_base = TPS65910_INT_STS,
        .mask_base = TPS65910_INT_MSK,
-       .ack_base = TPS65910_INT_MSK,
+       .ack_base = TPS65910_INT_STS,
 };
 
 static struct regmap_irq_chip tps65910_irq_chip = {
@@ -222,7 +222,7 @@ static struct regmap_irq_chip tps65910_irq_chip = {
        .irq_reg_stride = 2,
        .status_base = TPS65910_INT_STS,
        .mask_base = TPS65910_INT_MSK,
-       .ack_base = TPS65910_INT_MSK,
+       .ack_base = TPS65910_INT_STS,
 };
 
 static int tps65910_irq_init(struct tps65910 *tps65910, int irq,