drm/i915: Use dev_priv as first argument of for_each_pipe()

Chris has decided that enough is enough. It's time to fixup dev Vs
dev_priv. This is a modest contribution to the crusade.

v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode
    the info struct with defines (Chris)
    Rename the macro argument from 'dev' to 'dev_priv' (Jani)

v3: Use names unlikely to be used as macro arguments (Chris)

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b2c4cf8a246178653ad00d2192d1534fd33b1058..8246cfea9abb4b7d48bb534b14a148273c39b34a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -662,7 +662,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
                           I915_READ(VLV_IIR_RW));
                seq_printf(m, "Display IMR:\t%08x\n",
                           I915_READ(VLV_IMR));
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        seq_printf(m, "Pipe %c stat:\t%08x\n",
                                   pipe_name(pipe),
                                   I915_READ(PIPESTAT(pipe)));
@@ -702,7 +702,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
                                   i, I915_READ(GEN8_GT_IER(i)));
                }
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        if (!intel_display_power_enabled(dev_priv,
                                                POWER_DOMAIN_PIPE(pipe))) {
                                seq_printf(m, "Pipe %c power disabled\n",
@@ -749,7 +749,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
                           I915_READ(VLV_IIR_RW));
                seq_printf(m, "Display IMR:\t%08x\n",
                           I915_READ(VLV_IMR));
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        seq_printf(m, "Pipe %c stat:\t%08x\n",
                                   pipe_name(pipe),
                                   I915_READ(PIPESTAT(pipe)));
@@ -785,7 +785,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
                           I915_READ(IIR));
                seq_printf(m, "Interrupt mask:      %08x\n",
                           I915_READ(IMR));
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        seq_printf(m, "Pipe %c stat:         %08x\n",
                                   pipe_name(pipe),
                                   I915_READ(PIPESTAT(pipe)));
@@ -4188,7 +4188,7 @@ void intel_display_crc_init(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        enum pipe pipe;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[pipe];
 
                pipe_crc->opened = false;

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 3f676f904f7e34f3298ee91b63c782ef107dafdb..f19dbff0e73b5cc40a7bfae36c5fe88962688c37 100644 (file)
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1528,10 +1528,10 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
        info = (struct intel_device_info *)&dev_priv->info;
 
        if (IS_VALLEYVIEW(dev))
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        info->num_sprites[pipe] = 2;
        else
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        info->num_sprites[pipe] = 1;
 
        if (i915.disable_display) {

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9c3677e4448e72e0eeee7ead8e3643207a6f2e7f..de334d78e07ce685f2c7265277de55295e606d56 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -163,7 +163,8 @@ enum hpd_pin {
         I915_GEM_DOMAIN_INSTRUCTION | \
         I915_GEM_DOMAIN_VERTEX)
 
-#define for_each_pipe(p) for ((p) = 0; (p) < INTEL_INFO(dev)->num_pipes; (p)++)
+#define for_each_pipe(__dev_priv, __p) \
+       for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
 #define for_each_sprite(p, s) for ((s) = 0; (s) < INTEL_INFO(dev)->num_sprites[(p)]; (s)++)
 
 #define for_each_crtc(dev, crtc) \

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8b158f02bd0fecea53a72ef45eb119cad1a256c2..8883a48c08b94a952a18e3af68800d8a5188be9d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -238,7 +238,7 @@ static bool ivb_can_enable_err_int(struct drm_device *dev)
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
 
                if (crtc->cpu_fifo_underrun_disabled)
@@ -296,7 +296,7 @@ static bool cpt_can_enable_serr_int(struct drm_device *dev)
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
 
                if (crtc->pch_fifo_underrun_disabled)
@@ -2020,7 +2020,7 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
        int pipe;
 
        spin_lock(&dev_priv->irq_lock);
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                int reg;
                u32 mask, iir_bit = 0;
 
@@ -2065,7 +2065,7 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
        }
        spin_unlock(&dev_priv->irq_lock);
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
                        intel_pipe_handle_vblank(dev, pipe);
 
@@ -2234,7 +2234,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
                DRM_ERROR("PCH poison interrupt\n");
 
        if (pch_iir & SDE_FDI_MASK)
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",
                                         pipe_name(pipe),
                                         I915_READ(FDI_RX_IIR(pipe)));
@@ -2265,7 +2265,7 @@ static void ivb_err_int_handler(struct drm_device *dev)
        if (err_int & ERR_INT_POISON)
                DRM_ERROR("Poison interrupt\n");
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (err_int & ERR_INT_FIFO_UNDERRUN(pipe)) {
                        if (intel_set_cpu_fifo_underrun_reporting(dev, pipe,
                                                                  false))
@@ -2342,7 +2342,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
                DRM_DEBUG_DRIVER("Audio CP change interrupt\n");
 
        if (pch_iir & SDE_FDI_MASK_CPT)
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",
                                         pipe_name(pipe),
                                         I915_READ(FDI_RX_IIR(pipe)));
@@ -2365,7 +2365,7 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
        if (de_iir & DE_POISON)
                DRM_ERROR("Poison interrupt\n");
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (de_iir & DE_PIPE_VBLANK(pipe))
                        intel_pipe_handle_vblank(dev, pipe);
 
@@ -2415,7 +2415,7 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
        if (de_iir & DE_GSE_IVB)
                intel_opregion_asle_intr(dev);
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
                        intel_pipe_handle_vblank(dev, pipe);
 
@@ -2562,7 +2562,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
                        DRM_ERROR("The master control interrupt lied (DE PORT)!\n");
        }
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                uint32_t pipe_iir;
 
                if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe)))
@@ -2781,7 +2781,7 @@ static void i915_report_and_clear_eir(struct drm_device *dev)
 
        if (eir & I915_ERROR_MEMORY_REFRESH) {
                pr_err("memory refresh error:\n");
-               for_each_pipe(pipe)
+               for_each_pipe(dev_priv, pipe)
                        pr_err("pipe %c stat: 0x%08x\n",
                               pipe_name(pipe), I915_READ(PIPESTAT(pipe)));
                /* pipestat has already been acked */
@@ -3459,7 +3459,7 @@ static void valleyview_irq_preinstall(struct drm_device *dev)
 
        I915_WRITE(PORT_HOTPLUG_EN, 0);
        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0xffff);
        I915_WRITE(VLV_IIR, 0xffffffff);
        I915_WRITE(VLV_IMR, 0xffffffff);
@@ -3485,7 +3485,7 @@ static void gen8_irq_reset(struct drm_device *dev)
 
        gen8_gt_irq_reset(dev_priv);
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                if (intel_display_power_enabled(dev_priv,
                                                POWER_DOMAIN_PIPE(pipe)))
                        GEN8_IRQ_RESET_NDX(DE_PIPE, pipe);
@@ -3528,7 +3528,7 @@ static void cherryview_irq_preinstall(struct drm_device *dev)
        I915_WRITE(PORT_HOTPLUG_EN, 0);
        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0xffff);
 
        I915_WRITE(VLV_IMR, 0xffffffff);
@@ -3825,7 +3825,6 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 
 static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
 {
-       struct drm_device *dev = dev_priv->dev;
        uint32_t de_pipe_masked = GEN8_PIPE_PRIMARY_FLIP_DONE |
                GEN8_PIPE_CDCLK_CRC_DONE |
                GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
@@ -3836,7 +3835,7 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
        dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;
        dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked;
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                if (intel_display_power_enabled(dev_priv,
                                POWER_DOMAIN_PIPE(pipe)))
                        GEN8_IRQ_INIT_NDX(DE_PIPE, pipe,
@@ -3881,12 +3880,12 @@ static int cherryview_irq_postinstall(struct drm_device *dev)
         */
        dev_priv->irq_mask = ~enable_mask;
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0xffff);
 
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
        i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                i915_enable_pipestat(dev_priv, pipe, pipestat_enable);
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 
@@ -3923,7 +3922,7 @@ static void valleyview_irq_uninstall(struct drm_device *dev)
 
        I915_WRITE(VLV_MASTER_IER, 0);
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0xffff);
 
        I915_WRITE(HWSTAM, 0xffffffff);
@@ -3985,7 +3984,7 @@ do {                                                      \
        I915_WRITE(PORT_HOTPLUG_EN, 0);
        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0xffff);
 
        I915_WRITE(VLV_IMR, 0xffffffff);
@@ -4009,7 +4008,7 @@ static void i8xx_irq_preinstall(struct drm_device * dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int pipe;
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0);
        I915_WRITE16(IMR, 0xffff);
        I915_WRITE16(IER, 0x0);
@@ -4109,7 +4108,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
                                          "Command parser error, iir 0x%08x",
                                          iir);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        int reg = PIPESTAT(pipe);
                        pipe_stats[pipe] = I915_READ(reg);
 
@@ -4129,7 +4128,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
                if (iir & I915_USER_INTERRUPT)
                        notify_ring(dev, &dev_priv->ring[RCS]);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        int plane = pipe;
                        if (HAS_FBC(dev))
                                plane = !plane;
@@ -4157,7 +4156,7 @@ static void i8xx_irq_uninstall(struct drm_device * dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int pipe;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                /* Clear enable bits; then clear status bits */
                I915_WRITE(PIPESTAT(pipe), 0);
                I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
@@ -4178,7 +4177,7 @@ static void i915_irq_preinstall(struct drm_device * dev)
        }
 
        I915_WRITE16(HWSTAM, 0xeffe);
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0);
        I915_WRITE(IMR, 0xffffffff);
        I915_WRITE(IER, 0x0);
@@ -4293,7 +4292,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
                                          "Command parser error, iir 0x%08x",
                                          iir);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        int reg = PIPESTAT(pipe);
                        pipe_stats[pipe] = I915_READ(reg);
 
@@ -4319,7 +4318,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
                if (iir & I915_USER_INTERRUPT)
                        notify_ring(dev, &dev_priv->ring[RCS]);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        int plane = pipe;
                        if (HAS_FBC(dev))
                                plane = !plane;
@@ -4377,7 +4376,7 @@ static void i915_irq_uninstall(struct drm_device * dev)
        }
 
        I915_WRITE16(HWSTAM, 0xffff);
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                /* Clear enable bits; then clear status bits */
                I915_WRITE(PIPESTAT(pipe), 0);
                I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
@@ -4397,7 +4396,7 @@ static void i965_irq_preinstall(struct drm_device * dev)
        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 
        I915_WRITE(HWSTAM, 0xeffe);
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0);
        I915_WRITE(IMR, 0xffffffff);
        I915_WRITE(IER, 0x0);
@@ -4522,7 +4521,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
                                          "Command parser error, iir 0x%08x",
                                          iir);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        int reg = PIPESTAT(pipe);
                        pipe_stats[pipe] = I915_READ(reg);
 
@@ -4553,7 +4552,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
                if (iir & I915_BSD_USER_INTERRUPT)
                        notify_ring(dev, &dev_priv->ring[VCS]);
 
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS &&
                            i915_handle_vblank(dev, pipe, pipe, iir))
                                flip_mask &= ~DISPLAY_PLANE_FLIP_PENDING(pipe);
@@ -4610,12 +4609,12 @@ static void i965_irq_uninstall(struct drm_device * dev)
        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
 
        I915_WRITE(HWSTAM, 0xffffffff);
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe), 0);
        I915_WRITE(IMR, 0xffffffff);
        I915_WRITE(IER, 0x0);
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                I915_WRITE(PIPESTAT(pipe),
                           I915_READ(PIPESTAT(pipe)) & 0x8000ffff);
        I915_WRITE(IIR, I915_READ(IIR));

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4933bb8504aa9a0b394e105a3836f7d0160d59e6..daac35e384122b3a08b2a8b5d67a292963e0cde6 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1301,7 +1301,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
        }
 
        /* Need to check both planes against the pipe */
-       for_each_pipe(i) {
+       for_each_pipe(dev_priv, i) {
                reg = DSPCNTR(i);
                val = I915_READ(reg);
                cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >>
@@ -8993,12 +8993,13 @@ static void intel_mark_fb_busy(struct drm_device *dev,
                               unsigned frontbuffer_bits,
                               struct intel_engine_cs *ring)
 {
+       struct drm_i915_private *dev_priv = dev->dev_private;
        enum pipe pipe;
 
        if (!i915.powersave)
                return;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (!(frontbuffer_bits & INTEL_FRONTBUFFER_ALL_MASK(pipe)))
                        continue;
 
@@ -12752,7 +12753,7 @@ void intel_modeset_init(struct drm_device *dev)
                      INTEL_INFO(dev)->num_pipes,
                      INTEL_INFO(dev)->num_pipes > 1 ? "s" : "");
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                intel_crtc_init(dev, pipe);
                for_each_sprite(pipe, sprite) {
                        ret = intel_plane_init(dev, pipe, sprite);
@@ -13159,7 +13160,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
                intel_sanitize_encoder(encoder);
        }
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
                intel_sanitize_crtc(crtc);
                intel_dump_pipe_config(crtc, &crtc->config, "[setup_hw_state]");
@@ -13187,7 +13188,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
                 * We need to use raw interfaces for restoring state to avoid
                 * checking (bogus) intermediate states.
                 */
-               for_each_pipe(pipe) {
+               for_each_pipe(dev_priv, pipe) {
                        struct drm_crtc *crtc =
                                dev_priv->pipe_to_crtc_mapping[pipe];
 
@@ -13408,7 +13409,7 @@ intel_display_capture_error_state(struct drm_device *dev)
        if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER);
 
-       for_each_pipe(i) {
+       for_each_pipe(dev_priv, i) {
                error->pipe[i].power_domain_on =
                        intel_display_power_enabled_unlocked(dev_priv,
                                                           POWER_DOMAIN_PIPE(i));
@@ -13472,6 +13473,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
                                struct drm_device *dev,
                                struct intel_display_error_state *error)
 {
+       struct drm_i915_private *dev_priv = dev->dev_private;
        int i;
 
        if (!error)
@@ -13481,7 +13483,7 @@ intel_display_print_error_state(struct drm_i915_error_state_buf *m,
        if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                err_printf(m, "PWR_WELL_CTL2: %08x\n",
                           error->power_well_driver);
-       for_each_pipe(i) {
+       for_each_pipe(dev_priv, i) {
                err_printf(m, "Pipe [%d]:\n", i);
                err_printf(m, "  Power: %s\n",
                           error->pipe[i].power_domain_on ? "on" : "off");

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1642d3019c042d6d147d0236f27de3564886124d..6b359cf11dfc8c4a6e1d61e1ddbf4bfadfc504a5 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1598,7 +1598,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
                        return true;
                }
 
-               for_each_pipe(i) {
+               for_each_pipe(dev_priv, i) {
                        trans_dp = I915_READ(TRANS_DP_CTL(i));
                        if ((trans_dp & TRANS_DP_PORT_SEL_MASK) == trans_sel) {
                                *pipe = i;

diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 764f9283e572d9444a4ca2e18b0af485f90cdcd0..fd6f1f89865e10b3f3d27af5acf19dc6ed1dc3b0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1230,7 +1230,7 @@ static int vlv_setup_backlight(struct intel_connector *connector)
        enum pipe pipe;
        u32 ctl, ctl2, val;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
 
                /* Skip if the modulation freq is already set */

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ab3e117644ee06ea21f5280aa90ec99b4a9bc90..b1b3a6b892c6bf572851fe2118fda3fa610201c0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2654,7 +2654,7 @@ static struct intel_pipe_wm *ilk_find_best_result(struct drm_device *dev,
 #define WM_DIRTY_FBC (1 << 24)
 #define WM_DIRTY_DDB (1 << 25)
 
-static unsigned int ilk_compute_wm_dirty(struct drm_device *dev,
+static unsigned int ilk_compute_wm_dirty(struct drm_i915_private *dev_priv,
                                         const struct ilk_wm_values *old,
                                         const struct ilk_wm_values *new)
 {
@@ -2662,7 +2662,7 @@ static unsigned int ilk_compute_wm_dirty(struct drm_device *dev,
        enum pipe pipe;
        int wm_lp;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                if (old->wm_linetime[pipe] != new->wm_linetime[pipe]) {
                        dirty |= WM_DIRTY_LINETIME(pipe);
                        /* Must disable LP1+ watermarks too */
@@ -2748,7 +2748,7 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
        unsigned int dirty;
        uint32_t val;
 
-       dirty = ilk_compute_wm_dirty(dev, previous, results);
+       dirty = ilk_compute_wm_dirty(dev_priv, previous, results);
        if (!dirty)
                return;
 
@@ -5213,7 +5213,7 @@ static void g4x_disable_trickle_feed(struct drm_device *dev)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int pipe;
 
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                I915_WRITE(DSPCNTR(pipe),
                           I915_READ(DSPCNTR(pipe)) |
                           DISPPLANE_TRICKLE_FEED_DISABLE);
@@ -5328,7 +5328,7 @@ static void cpt_init_clock_gating(struct drm_device *dev)
        /* The below fixes the weird display corruption, a few pixels shifted
         * downward, on (only) LVDS of some HP laptops with IVY.
         */
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                val = I915_READ(TRANS_CHICKEN2(pipe));
                val |= TRANS_CHICKEN2_TIMING_OVERRIDE;
                val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
@@ -5340,7 +5340,7 @@ static void cpt_init_clock_gating(struct drm_device *dev)
                I915_WRITE(TRANS_CHICKEN2(pipe), val);
        }
        /* WADP0ClockGatingDisable */
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                I915_WRITE(TRANS_CHICKEN1(pipe),
                           TRANS_CHICKEN1_DP0UNIT_GC_DISABLE);
        }
@@ -5560,7 +5560,7 @@ static void gen8_init_clock_gating(struct drm_device *dev)
                   I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD);
 
        /* WaPsrDPRSUnmaskVBlankInSRD:bdw */
-       for_each_pipe(pipe) {
+       for_each_pipe(dev_priv, pipe) {
                I915_WRITE(CHICKEN_PIPESL_1(pipe),
                           I915_READ(CHICKEN_PIPESL_1(pipe)) |
                           BDW_DPRS_MASK_VBLANK_SRD);
@@ -6363,12 +6363,11 @@ static void vlv_dpio_cmn_power_well_enable(struct drm_i915_private *dev_priv,
 static void vlv_dpio_cmn_power_well_disable(struct drm_i915_private *dev_priv,
                                            struct i915_power_well *power_well)
 {
-       struct drm_device *dev = dev_priv->dev;
        enum pipe pipe;
 
        WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC);
 
-       for_each_pipe(pipe)
+       for_each_pipe(dev_priv, pipe)
                assert_pll_disabled(dev_priv, pipe);
 
        /* Assert common reset */