arm64: dts: add CPU topology on Juno
authorSudeep Holla <sudeep.holla@arm.com>
Wed, 3 Jun 2015 13:31:49 +0000 (14:31 +0100)
committerSudeep Holla <sudeep.holla@arm.com>
Fri, 9 Oct 2015 09:23:49 +0000 (10:23 +0100)
This patch adds CPU topology on Juno. It will be useful for ther other
IP blocks depending on this topology.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
arch/arm64/boot/dts/arm/juno-r1.dts
arch/arm64/boot/dts/arm/juno.dts

index c62751153a4fc528202b4d645fc930f851aa2bc1..69130840c6cd146dd88f007701829e2fabd34afb 100644 (file)
                #address-cells = <2>;
                #size-cells = <0>;
 
+               cpu-map {
+                       cluster0 {
+                               core0 {
+                                       cpu = <&A57_0>;
+                               };
+                               core1 {
+                                       cpu = <&A57_1>;
+                               };
+                       };
+
+                       cluster1 {
+                               core0 {
+                                       cpu = <&A53_0>;
+                               };
+                               core1 {
+                                       cpu = <&A53_1>;
+                               };
+                               core2 {
+                                       cpu = <&A53_2>;
+                               };
+                               core3 {
+                                       cpu = <&A53_3>;
+                               };
+                       };
+               };
+
                A57_0: cpu@0 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x0 0x0>;
index d7cbdd482a61d231cbbfcff772dcf48e51e92bb2..ce1128a54c8d839147429579d695757645985725 100644 (file)
                #address-cells = <2>;
                #size-cells = <0>;
 
+               cpu-map {
+                       cluster0 {
+                               core0 {
+                                       cpu = <&A57_0>;
+                               };
+                               core1 {
+                                       cpu = <&A57_1>;
+                               };
+                       };
+
+                       cluster1 {
+                               core0 {
+                                       cpu = <&A53_0>;
+                               };
+                               core1 {
+                                       cpu = <&A53_1>;
+                               };
+                               core2 {
+                                       cpu = <&A53_2>;
+                               };
+                               core3 {
+                                       cpu = <&A53_3>;
+                               };
+                       };
+               };
+
                A57_0: cpu@0 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x0 0x0>;