ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x

Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 2a405544ea4643563eb0a60c022cff8c3b298e7f..bb559d0cd956223a7a12bd3152d9ee31a0e46512 100644 (file)
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -298,8 +298,10 @@
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044000 0x20>;
                #power-domain-cells = <0>;
-               clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
-               clock-names = "asb0", "asb1";
+               clocks = <&clock CLK_FIN_PLL>,
+                        <&clock CLK_MOUT_USER_ACLK300_GSCL>,
+                        <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
+               clock-names = "oscclk", "clk0", "asb0", "asb1";
        };
 
        isp_pd: power-domain@10044020 {