MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP

Although the GIC counter will continue when a core is in a low power
state and it will still trigger interrupts, the core will be incapable
of servicing those interrupts rendering them useless.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>

diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c
index 594cbbf16d627815383fa5385ad852848dcae16c..925bae55906705b7957ab9c367245a0d7872af3c 100644 (file)
--- a/arch/mips/kernel/cevt-gic.c
+++ b/arch/mips/kernel/cevt-gic.c
@@ -73,7 +73,8 @@ int gic_clockevent_init(void)
        cd = &per_cpu(gic_clockevent_device, cpu);
 
        cd->name                = "MIPS GIC";
-       cd->features            = CLOCK_EVT_FEAT_ONESHOT;
+       cd->features            = CLOCK_EVT_FEAT_ONESHOT |
+                                 CLOCK_EVT_FEAT_C3STOP;
 
        clockevent_set_clock(cd, gic_frequency);