ARM: dts: Add Arria10 SD/MMC EDAC devicetree entry

Add the device tree entries needed to support the Altera SD/MMC
FIFO buffer EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1470753653-23465-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
index 8a7dfa473e988a3cd336698b45a28f0ffcbe777b..040a164ba148101594a83f0f61d3ac926f1783c1 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -25,3 +25,15 @@
        broken-cd;
        bus-width = <4>;
 };
+
+&eccmgr {
+       sdmmca-ecc@ff8c2c00 {
+               compatible = "altr,socfpga-sdmmc-ecc";
+               reg = <0xff8c2c00 0x400>;
+               altr,ecc-parent = <&mmc>;
+               interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
+                            <47 IRQ_TYPE_LEVEL_HIGH>,
+                            <16 IRQ_TYPE_LEVEL_HIGH>,
+                            <48 IRQ_TYPE_LEVEL_HIGH>;
+       };
+};