x86: I/O APIC: keep the timer IRQ masked during set-up
authorMaciej W. Rozycki <macro@linux-mips.org>
Tue, 27 May 2008 20:19:45 +0000 (21:19 +0100)
committerIngo Molnar <mingo@elte.hu>
Tue, 8 Jul 2008 07:13:06 +0000 (09:13 +0200)
Keep the timer interrupt line masked when reconfiguring its interrupt
redirection entry in the I/O APIC.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/io_apic_64.c

index b381f93b79ae641a776838ae986c6cbad25e5b06..63a2f64c765b6c4d37b6ee1778e1eac1416f6d02 100644 (file)
@@ -1316,7 +1316,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
         * to the first CPU.
         */
        entry.dest_mode = INT_DEST_MODE;
-       entry.mask = 0;                                 /* unmask IRQ now */
+       entry.mask = 1;                                 /* mask IRQ now */
        entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
        entry.delivery_mode = INT_DELIVERY_MODE;
        entry.polarity = 0;
index 0e20b7d7c1c761028dfda593f310be2fc153df4e..ae0ac990574fa4ea2cd3f01418413a9d00abbade 100644 (file)
@@ -911,7 +911,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
         * to the first CPU.
         */
        entry.dest_mode = INT_DEST_MODE;
-       entry.mask = 0;                                 /* unmask IRQ now */
+       entry.mask = 1;                                 /* mask IRQ now */
        entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
        entry.delivery_mode = INT_DELIVERY_MODE;
        entry.polarity = 0;