omap1: Use asm_irq_flags for entry-macro.S

Initialize asm_irq_flags in omap_init_irq and use it in
get_irqnr_and_base to detect between omap7xx and omap15xx/16xx.

Note that both INT_1510_IH2_IRQ and INT_1510_IH2_IRQ are defined
as 0, so use INT_1510_IH2_IRQ for both of them.

Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index df9060edda2872536b7f313c2a1f1f0b16f08a69..c9be6d4d83e27cfd034cd8ea8df34948d3364a8c 100644 (file)
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -14,18 +14,17 @@
 #include <mach/irqs.h>
 #include <asm/hardware/gic.h>
 
-#if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \
-       (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
-#error "FIXME: OMAP7XX doesn't support multiple-OMAP"
-#elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
-#define INT_IH2_IRQ            INT_7XX_IH2_IRQ
-#elif defined(CONFIG_ARCH_OMAP15XX)
-#define INT_IH2_IRQ            INT_1510_IH2_IRQ
-#elif defined(CONFIG_ARCH_OMAP16XX)
-#define INT_IH2_IRQ            INT_1610_IH2_IRQ
-#else
-#warning "IH2 IRQ defaulted"
-#define INT_IH2_IRQ            INT_1510_IH2_IRQ
+/*
+ * We use __glue to avoid errors with multiple definitions of
+ * .globl omap_irq_flags as it's included from entry-armv.S but not
+ * from entry-common.S.
+ */
+#ifdef __glue
+               .pushsection .data
+               .globl  omap_irq_flags
+omap_irq_flags:
+               .word   0
+               .popsection
 #endif
 
                .macro  disable_fiq
@@ -47,9 +46,11 @@
                beq     1510f
 
                ldr     \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
+               ldr     \tmp, =omap_irq_flags   @ irq flags address
+               ldr     \tmp, [\tmp, #0]        @ irq flags value
                cmp     \irqnr, #0
                ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
-               cmpeq   \irqnr, #INT_IH2_IRQ
+               cmpeq   \irqnr, \tmp
                ldreq   \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
                ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
                addeqs  \irqnr, \irqnr, #32

diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index db913c34d1fe8ede759883300237a047f1e05791..6bddbc869f4c9e53fb3e26609ef5fc10b5ed9bbd 100644 (file)
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -176,26 +176,31 @@ static struct irq_chip omap_irq_chip = {
 
 void __init omap_init_irq(void)
 {
+       extern unsigned int omap_irq_flags;
        int i, j;
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
        if (cpu_is_omap7xx()) {
+               omap_irq_flags = INT_7XX_IH2_IRQ;
                irq_banks = omap7xx_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
        }
 #endif
 #ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
+               omap_irq_flags = INT_1510_IH2_IRQ;
                irq_banks = omap1510_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
        }
        if (cpu_is_omap310()) {
+               omap_irq_flags = INT_1510_IH2_IRQ;
                irq_banks = omap310_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
        }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
        if (cpu_is_omap16xx()) {
+               omap_irq_flags = INT_1510_IH2_IRQ;
                irq_banks = omap1610_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap1610_irq_banks);
        }

diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 65e20a686713731be41d9eb9285cb6aa592e0fd6..2910de921c52b3acf70246ccd55d1da0611b40a5 100644 (file)
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -77,7 +77,7 @@
 /*
  * OMAP-1610 specific IRQ numbers for interrupt handler 1
  */
-#define INT_1610_IH2_IRQ       0
+#define INT_1610_IH2_IRQ       INT_1510_IH2_IRQ
 #define INT_1610_IH2_FIQ       2
 #define INT_1610_McBSP2_TX     4
 #define INT_1610_McBSP2_RX     5