drm/i915: Pass dev_priv to HAS_FW_BLC
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2016 20:37:18 +0000 (22:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Nov 2016 14:40:38 +0000 (16:40 +0200)
Unify our approach to things by passing around dev_priv instead of dev.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477946245-14134-20-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c

index fd08559f94d4994fd428bace9e20f1bf40480853..fdfb1d20adffdeccc6ca058fefcbd76ffcbfc661 100644 (file)
@@ -2893,7 +2893,7 @@ struct drm_i915_cmd_table {
 #define SUPPORTS_TV(dev)               (INTEL_INFO(dev)->supports_tv)
 #define I915_HAS_HOTPLUG(dev)           (INTEL_INFO(dev)->has_hotplug)
 
-#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
+#define HAS_FW_BLC(dev_priv) (INTEL_GEN(dev_priv) > 2)
 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
 #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
 
index 83391c28a72751bd068338d92a7f4aa211dddd62..afd3babc4a9d9193296a146887aa07e40671a099 100644 (file)
@@ -1612,7 +1612,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
        intel_set_memory_cxsr(dev_priv, false);
 
        /* Calc sr entries for one plane configs */
-       if (HAS_FW_BLC(dev) && enabled) {
+       if (HAS_FW_BLC(dev_priv) && enabled) {
                /* self-refresh has much higher latency */
                static const int sr_latency_ns = 6000;
                const struct drm_display_mode *adjusted_mode =