help
High-speed I2C controller on Exynos5 based Samsung SoCs.
+config I2C_SAMSUNG_HWACG
+ bool "HWACG(HW Auto Clock Gating) support for Exynos I2C port"
+ default y
+ help
+ If HWACG is enabled on I2C, System power mode will goes into
+ suspend state only when I2C master is not in busy state.
+ To support HWACG on I2C, this configuration should be selected.
+
config I2C_GPIO
tristate "GPIO-based bitbanging I2C"
depends on GPIOLIB || COMPILE_TEST
#ifdef CONFIG_PM
static int exynos5_i2c_suspend_noirq(struct device *dev)
{
- struct exynos5_i2c *i2c = dev_get_drvdata(dev);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct exynos5_i2c *i2c = platform_get_drvdata(pdev);
+#ifdef CONFIG_I2C_SAMSUNG_HWACG
+ int ret = 0;
+#endif
i2c_lock_adapter(&i2c->adap);
+#ifdef CONFIG_I2C_SAMSUNG_HWACG
+ exynos_update_ip_idle_status(i2c->idle_ip_index, 0);
+ ret = clk_enable(i2c->clk);
+ if (ret) {
+ exynos_update_ip_idle_status(i2c->idle_ip_index, 1);
+ i2c_unlock_adapter(&i2c->adap);
+ return ret;
+ }
+ exynos5_i2c_reset(i2c);
+ clk_disable(i2c->clk);
+ exynos_update_ip_idle_status(i2c->idle_ip_index, 1);
+#endif
i2c->suspended = 1;
i2c_unlock_adapter(&i2c->adap);