ath9k: ar9271_hw_pa_cal: use proper makroses.

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index 4576b99dd0cc049648dcdcad68972f43a2bc693a..8d24a73ca9f2a30ffea73178ceb2fc8418bbd498 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -443,33 +443,30 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
        for (i = 0; i < ARRAY_SIZE(regList); i++)
                regList[i][1] = REG_READ(ah, regList[i][0]);
 
-       regVal = REG_READ(ah, AR9285_AN_RF2G6);
-       regVal &= (~(0x1));
-       REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
-       regVal = REG_READ(ah, 0x9808);
-       regVal |= (0x1 << 27);
-       REG_WRITE(ah, 0x9808, regVal);
-
+       /* 7834, b1=0 */
+       REG_CLR_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
+       /* 9808, b27=1 */
+       REG_SET_BIT(ah, 0x9808, 1 << 27);
        /* 786c,b23,1, pwddac=1 */
-       REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
+       REG_SET_BIT(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC);
        /* 7854, b5,1, pdrxtxbb=1 */
-       REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
+       REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1);
        /* 7854, b7,1, pdv2i=1 */
-       REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
+       REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I);
        /* 7854, b8,1, pddacinterface=1 */
-       REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
+       REG_SET_BIT(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF);
        /* 7824,b12,0, offcal=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL);
        /* 7838, b1,0, pwddb=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB);
        /* 7820,b11,0, enpacal=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL);
        /* 7820,b25,1, pdpadrv1=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1);
        /* 7820,b24,0, pdpadrv2=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2);
        /* 7820,b23,0, pdpaout=0 */
-       REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
+       REG_CLR_BIT(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT);
        /* 783c,b14-16,7, padrvgn2tab_0=7 */
        REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
        /*
@@ -516,15 +513,13 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
                ah->pacal_info.prev_offset = regVal;
        }
 
-       ENABLE_REGWRITE_BUFFER(ah);
 
-       regVal = REG_READ(ah, AR_AN_RF2G1_CH1);
-       regVal |= 0x1;
-       REG_WRITE(ah, AR_AN_RF2G1_CH1, regVal);
-       regVal = REG_READ(ah, 0x9808);
-       regVal &= (~(0x1 << 27));
-       REG_WRITE(ah, 0x9808, regVal);
+       /* 7834, b1=1 */
+       REG_SET_BIT(ah, AR9285_AN_RF2G6, 1 << 0);
+       /* 9808, b27=0 */
+       REG_CLR_BIT(ah, 0x9808, 1 << 27);
 
+       ENABLE_REGWRITE_BUFFER(ah);
        for (i = 0; i < ARRAY_SIZE(regList); i++)
                REG_WRITE(ah, regList[i][0], regList[i][1]);