drm: Remove drm_resource wrappers

Remove the drm_resource wrappers and directly use the
actual PCI and/or platform functions in their place.

[airlied: fixup nouveau properly to build]

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index f7ba82ebf65ae03ead6f466d9f2579cc753a0c95..7783035871e9b37a88186910ef6fdaa5bd1ac1c8 100644 (file)
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -39,19 +39,6 @@
 #include <asm/shmparam.h>
 #include "drmP.h"
 
-resource_size_t drm_get_resource_start(struct drm_device *dev, unsigned int resource)
-{
-       return pci_resource_start(dev->pdev, resource);
-}
-EXPORT_SYMBOL(drm_get_resource_start);
-
-resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned int resource)
-{
-       return pci_resource_len(dev->pdev, resource);
-}
-
-EXPORT_SYMBOL(drm_get_resource_len);
-
 static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
                                                  struct drm_local_map *map)
 {

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 2a6b5de5ae5d07330232b8aff6b0b989300147a2..9fe2d08d9e9d91363cd2ce2c979e52c47a1b0109 100644 (file)
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1429,7 +1429,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
        int fb_bar = IS_I9XX(dev) ? 2 : 0;
        int ret = 0;
 
-       dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
+       dev->mode_config.fb_base = pci_resource_start(dev->pdev, fb_bar) &
                0xff000000;
 
        /* Basic memrange allocator for stolen space (aka vram) */
@@ -1612,8 +1612,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
        /* Add register map (needed for suspend/resume) */
        mmio_bar = IS_I9XX(dev) ? 0 : 1;
-       base = drm_get_resource_start(dev, mmio_bar);
-       size = drm_get_resource_len(dev, mmio_bar);
+       base = pci_resource_start(dev->pdev, mmio_bar);
+       size = pci_resource_len(dev->pdev, mmio_bar);
 
        if (i915_get_bridge_dev(dev)) {
                ret = -EIO;

diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index 3c917fb3a60b85398d84d456d36093d02924525b..ccc129c328a41941cce5e33839bad1bae62ab513 100644 (file)
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -405,8 +405,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
        dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
        dev_priv->chipset = flags;
 
-       dev_priv->mmio_base = drm_get_resource_start(dev, 1);
-       dev_priv->mmio_size = drm_get_resource_len(dev, 1);
+       dev_priv->mmio_base = pci_resource_start(dev->pdev, 1);
+       dev_priv->mmio_size = pci_resource_len(dev->pdev, 1);
 
        dev->counters += 3;
        dev->types[6] = _DRM_STAT_IRQ;

diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 6f3c195223772bf9adc6884db52b24711fdb32a1..9f5ab4677758e7ea1013a515ef9ff3f57379a8d7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
                break;
        case TTM_PL_VRAM:
                mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
-               mem->bus.base = drm_get_resource_start(dev, 1);
+               mem->bus.base = pci_resource_start(dev->pdev, 1);
                mem->bus.is_iomem = true;
                break;
        default:

diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 1fc57ef58295091eef1e8ad979ad50b17c2fb9a4..06555c7cde509104e8ce87c3b1b51bc54f17711c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan)
                 * VRAM.
                 */
                ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
-                                            drm_get_resource_start(dev, 1),
+                                            pci_resource_start(dev->pdev,
+                                            1),
                                             dev_priv->fb_available_size,
                                             NV_DMA_ACCESS_RO,
                                             NV_DMA_TARGET_PCI, &pushbuf);

diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 775a7017af6437da7c149dfda2a04d172704fdb2..37c7bf8e82960443b6796a286304c745245f85c5 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev)
        }
 
        if (dev_priv->fb_mtrr) {
-               drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),
-                            drm_get_resource_len(dev, 1), DRM_MTRR_WC);
+               drm_mtrr_del(dev_priv->fb_mtrr,
+                            pci_resource_start(dev->pdev, 1),
+                            pci_resource_len(dev->pdev, 1), DRM_MTRR_WC);
                dev_priv->fb_mtrr = 0;
        }
 }
@@ -632,7 +633,7 @@ nouveau_mem_init(struct drm_device *dev)
        struct ttm_bo_device *bdev = &dev_priv->ttm.bdev;
        int ret, dma_bits = 32;
 
-       dev_priv->fb_phys = drm_get_resource_start(dev, 1);
+       dev_priv->fb_phys = pci_resource_start(dev->pdev, 1);
        dev_priv->gart_info.type = NOUVEAU_GART_NONE;
 
        if (dev_priv->card_type >= NV_50 &&
@@ -664,8 +665,9 @@ nouveau_mem_init(struct drm_device *dev)
 
        dev_priv->fb_available_size = dev_priv->vram_size;
        dev_priv->fb_mappable_pages = dev_priv->fb_available_size;
-       if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1))
-               dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1);
+       if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1))
+               dev_priv->fb_mappable_pages =
+                       pci_resource_len(dev->pdev, 1);
        dev_priv->fb_mappable_pages >>= PAGE_SHIFT;
 
        /* remove reserved space at end of vram from available amount */
@@ -717,8 +719,8 @@ nouveau_mem_init(struct drm_device *dev)
                return ret;
        }
 
-       dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
-                                        drm_get_resource_len(dev, 1),
+       dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1),
+                                        pci_resource_len(dev->pdev, 1),
                                         DRM_MTRR_WC);
 
        return 0;

diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index d6fc0a82f03dd20ea8b7c21da48d75c98ebb0ad9..fe2349b115f0f3f8906c42baaae6774a7a8270ce 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev)
        nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp);
 
        /* begin RAM config */
-       vramsz = drm_get_resource_len(dev, 0) - 1;
+       vramsz = pci_resource_len(dev->pdev, 0) - 1;
        nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
        nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev)
        nv_wr32(dev, 0x0040075c             , 0x00000001);
 
        /* begin RAM config */
-       /* vramsz = drm_get_resource_len(dev, 0) - 1; */
+       /* vramsz = pci_resource_len(dev->pdev, 0) - 1; */
        nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));
        nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1));
        if (dev_priv->chipset != 0x34) {

diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 704a25d04ac92c75a20fe4f019a808c91ccd7304..65b13b54c5ae0e478fc3dac2aa0deb2274775b4b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev)
                nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
 
        /* begin RAM config */
-       vramsz = drm_get_resource_len(dev, 0) - 1;
+       vramsz = pci_resource_len(dev->pdev, 0) - 1;
        switch (dev_priv->chipset) {
        case 0x40:
                nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0));

diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index 5f21df31f3aa7f69beac46ff65dc11885a5f02bd..71c01b6e57319669cdaf995d1334c48375310ce8 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -241,7 +241,7 @@ nv50_instmem_init(struct drm_device *dev)
                return ret;
        BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000);
        BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 +
-                                             drm_get_resource_len(dev, 1) - 1);
+                                             pci_resource_len(dev->pdev, 1) - 1);
        BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000);
        BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000);
        BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000);

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 8c8e4d3cbaa377773d9fc39b5035a928f93ddf55..a4745e49ecf13cef848faa080bbf64bd60d64c9b 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1300,8 +1300,8 @@ int evergreen_mc_init(struct radeon_device *rdev)
        }
        rdev->mc.vram_width = numchan * chansize;
        /* Could aper size report 0 ? */
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        /* Setup GPU memory space */
        /* size in MB on evergreen */
        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index cc004b05d63e7ff7153b6f2f87b75f34c7062161..c485c2cec4da50f292ce46027c9961c46503f4ff 100644 (file)
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2284,8 +2284,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev)
        u64 config_aper_size;
 
        /* work out accessible VRAM */
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);
        /* FIXME we don't use the second aperture yet when we could use it */
        if (rdev->mc.visible_vram_size > rdev->mc.aper_size)

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 44e96a2ae25aa2be1640d491a68570aa1257bae9..4959619f8851eb4fea1df29d98266aae662be641 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1118,8 +1118,8 @@ int r600_mc_init(struct radeon_device *rdev)
        }
        rdev->mc.vram_width = numchan * chansize;
        /* Could aper size report 0 ? */
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        /* Setup GPU memory space */
        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index fbba938f80481a422418fc3f095b7eef3519c212..91f5b5a29a9f25b071cd36715e319f38dd5ae089 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -49,7 +49,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)
        resource_size_t size = 256 * 1024; /* ??? */
 
        rdev->bios = NULL;
-       vram_base = drm_get_resource_start(rdev->ddev, 0);
+       vram_base = pci_resource_start(rdev->pdev, 0);
        bios = ioremap(vram_base, size);
        if (!bios) {
                return false;

diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 2f042a3c0e62bb7bbe86fefa478109be033f1bb8..eb6b9eed7349264f29e5f498221b127942f51ec2 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
        else
                dev_priv->flags |= RADEON_IS_PCI;
 
-       ret = drm_addmap(dev, drm_get_resource_start(dev, 2),
-                        drm_get_resource_len(dev, 2), _DRM_REGISTERS,
+       ret = drm_addmap(dev, pci_resource_start(dev->pdev, 2),
+                        pci_resource_len(dev->pdev, 2), _DRM_REGISTERS,
                         _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio);
        if (ret != 0)
                return ret;
@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev)
 
        dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
 
-       dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0);
+       dev_priv->fb_aper_offset = pci_resource_start(dev->pdev, 0);
        ret = drm_addmap(dev, dev_priv->fb_aper_offset,
-                        drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER,
+                        pci_resource_len(dev->pdev, 0), _DRM_FRAME_BUFFER,
                         _DRM_WRITE_COMBINING, &map);
        if (ret != 0)
                return ret;

diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index fdc3fdf78acb3b45dc025ae6598942d032b99bf8..2a897a7ca26f0a9b24f3c830d6ca374f8bb401ae 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -648,8 +648,8 @@ int radeon_device_init(struct radeon_device *rdev,
 
        /* Registers mapping */
        /* TODO: block userspace mapping of io register */
-       rdev->rmmio_base = drm_get_resource_start(rdev->ddev, 2);
-       rdev->rmmio_size = drm_get_resource_len(rdev->ddev, 2);
+       rdev->rmmio_base = pci_resource_start(rdev->pdev, 2);
+       rdev->rmmio_size = pci_resource_len(rdev->pdev, 2);
        rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size);
        if (rdev->rmmio == NULL) {
                return -ENOMEM;

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 79887cac5b54ce19da66e1d5ba3e55df8df07527..340c7611f2ac8c458dfdbef9800749eefaeec16b 100644 (file)
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -685,8 +685,8 @@ void rs600_mc_init(struct radeon_device *rdev)
 {
        u64 base;
 
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        rdev->mc.vram_is_ddr = true;
        rdev->mc.vram_width = 128;
        rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index bcc33195ebc2a2e9d2f4e441ed7e88632b5d04bb..a18ba98885f398ac6c35f1708504769948710a59 100644 (file)
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -151,8 +151,8 @@ void rs690_mc_init(struct radeon_device *rdev)
        rdev->mc.vram_width = 128;
        rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
        rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        rdev->mc.visible_vram_size = rdev->mc.aper_size;
        base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
        base = G_000100_MC_FB_START(base) << 16;

diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 253f24aec031e48e1cf2bd99d8595a50275b1f0d..5c7f0b97c6aaab53070735ef2dd05f48caf13071 100644 (file)
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -908,8 +908,8 @@ int rv770_mc_init(struct radeon_device *rdev)
        }
        rdev->mc.vram_width = numchan * chansize;
        /* Could aper size report 0 ? */
-       rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
-       rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
+       rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);
+       rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);
        /* Setup GPU memory space */
        rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);
        rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index 2d0c9ca484c519bd9797b2a1f7917abca015a33d..f576232846c3540c49f32ae88645076843bd0c30 100644 (file)
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev)
        dev_priv->mtrr[2].handle = -1;
        if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
                fb_rsrc = 0;
-               fb_base = drm_get_resource_start(dev, 0);
+               fb_base = pci_resource_start(dev->pdev, 0);
                fb_size = SAVAGE_FB_SIZE_S3;
                mmio_base = fb_base + SAVAGE_FB_SIZE_S3;
                aper_rsrc = 0;
                aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
                /* this should always be true */
-               if (drm_get_resource_len(dev, 0) == 0x08000000) {
+               if (pci_resource_len(dev->pdev, 0) == 0x08000000) {
                        /* Don't make MMIO write-cobining! We need 3
                         * MTRRs. */
                        dev_priv->mtrr[0].base = fb_base;
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev)
                                         dev_priv->mtrr[2].size, DRM_MTRR_WC);
                } else {
                        DRM_ERROR("strange pci_resource_len %08llx\n",
-                                 (unsigned long long)drm_get_resource_len(dev, 0));
+                                 (unsigned long long)
+                                 pci_resource_len(dev->pdev, 0));
                }
        } else if (dev_priv->chipset != S3_SUPERSAVAGE &&
                   dev_priv->chipset != S3_SAVAGE2000) {
-               mmio_base = drm_get_resource_start(dev, 0);
+               mmio_base = pci_resource_start(dev->pdev, 0);
                fb_rsrc = 1;
-               fb_base = drm_get_resource_start(dev, 1);
+               fb_base = pci_resource_start(dev->pdev, 1);
                fb_size = SAVAGE_FB_SIZE_S4;
                aper_rsrc = 1;
                aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
                /* this should always be true */
-               if (drm_get_resource_len(dev, 1) == 0x08000000) {
+               if (pci_resource_len(dev->pdev, 1) == 0x08000000) {
                        /* Can use one MTRR to cover both fb and
                         * aperture. */
                        dev_priv->mtrr[0].base = fb_base;
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev)
                                         dev_priv->mtrr[0].size, DRM_MTRR_WC);
                } else {
                        DRM_ERROR("strange pci_resource_len %08llx\n",
-                                 (unsigned long long)drm_get_resource_len(dev, 1));
+                                 (unsigned long long)
+                                 pci_resource_len(dev->pdev, 1));
                }
        } else {
-               mmio_base = drm_get_resource_start(dev, 0);
+               mmio_base = pci_resource_start(dev->pdev, 0);
                fb_rsrc = 1;
-               fb_base = drm_get_resource_start(dev, 1);
-               fb_size = drm_get_resource_len(dev, 1);
+               fb_base = pci_resource_start(dev->pdev, 1);
+               fb_size = pci_resource_len(dev->pdev, 1);
                aper_rsrc = 2;
-               aperture_base = drm_get_resource_start(dev, 2);
+               aperture_base = pci_resource_start(dev->pdev, 2);
                /* Automatic MTRR setup will do the right thing. */
        }
 

diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index c1b987158dfa20c19285e59533c40b2aa5ebb0b2..8f7f5cb4a86d5320e1797d1c79329fa9a90074c5 100644 (file)
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1273,10 +1273,6 @@ extern int drm_freebufs(struct drm_device *dev, void *data,
 extern int drm_mapbufs(struct drm_device *dev, void *data,
                       struct drm_file *file_priv);
 extern int drm_order(unsigned long size);
-extern resource_size_t drm_get_resource_start(struct drm_device *dev,
-                                             unsigned int resource);
-extern resource_size_t drm_get_resource_len(struct drm_device *dev,
-                                           unsigned int resource);
 
                                /* DMA support (drm_dma.h) */
 extern int drm_dma_setup(struct drm_device *dev);