[9610] arm64: Add exynos dm node to exynos9610.
authorChungwoo Park <cww.park@samsung.com>
Mon, 14 May 2018 09:12:09 +0000 (18:12 +0900)
committerChungwoo Park <cww.park@samsung.com>
Mon, 21 May 2018 08:26:14 +0000 (17:26 +0900)
Change-Id: I33142c2603e66dd9456f3ddc36f35647ba3ddfc2
Signed-off-by: Chungwoo Park <cww.park@samsung.com>
arch/arm64/boot/dts/exynos/exynos9610.dtsi
include/dt-bindings/soc/samsung/exynos9610-dm.h [new file with mode: 0644]

index bb24c7af4f52eb8a8dbc1da30557074c15843d66..f89b523cd90119147c5d350fc0889410769a31e4 100644 (file)
@@ -20,6 +20,7 @@
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/ufs/ufs.h>
 #include "exynos9610-sysmmu.dtsi"
+#include <dt-bindings/soc/samsung/exynos9610-dm.h>
 
 / {
        compatible = "samsung,armv8", "samsung,exynos9610";
                status = "disabled";
        };
 
+       exynos_dm: exynos-dm@17000000 {
+               compatible = "samsung,exynos-dvfs-manager";
+               reg = <0x0 0x17000000 0x0>;
+               acpm-ipc-channel = <1>;
+               dm_domains {
+                       cpufreq_cl0 {
+                               dm-index = <DM_CPU_CL0>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_CPUCL0>;
+                               dm_type_name = "dm_cpu_cl0";
+                       };
+                       cpufreq_cl1 {
+                               dm-index = <DM_CPU_CL1>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_CPUCL1>;
+                               dm_type_name = "dm_cpu_cl1";
+                       };
+                       devfreq_mif {
+                               dm-index = <DM_MIF>;
+                               available = "true";
+                               policy_use = "true";
+                               cal_id = <ACPM_DVFS_MIF>;
+                               dm_type_name = "dm_mif";
+                       };
+                       devfreq_int {
+                               dm-index = <DM_INT>;
+                               available = "true";
+                               policy_use = "true";
+                               cal_id = <ACPM_DVFS_INT>;
+                               dm_type_name = "dm_int";
+                       };
+                       devfreq_intcam {
+                               dm-index = <DM_INTCAM>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_INTCAM>;
+                               dm_type_name = "dm_intcam";
+                       };
+                       devfreq_cam {
+                               dm-index = <DM_CAM>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_CAM>;
+                               dm_type_name = "dm_cam";
+                       };
+                       devfreq_disp {
+                               dm-index = <DM_DISP>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_DISP>;
+                               dm_type_name = "dm_disp";
+                       };
+                       devfreq_aud {
+                               dm-index = <DM_AUD>;
+                               available = "true";
+                               cal_id = <ACPM_DVFS_AUD>;
+                               dm_type_name = "dm_aud";
+                       };
+                       dvfs_gpu {
+                               dm-index = <DM_GPU>;
+                               available = "false";
+                               cal_id = <ACPM_DVFS_G3D>;
+                               dm_type_name = "dm_gpu";
+                       };
+               };
+       };
+
        tmuctrl_0: BIG@10070000 {
                compatible = "samsung,exynos9610-tmu";
                reg = <0x0 0x10070000 0x700>;
diff --git a/include/dt-bindings/soc/samsung/exynos9610-dm.h b/include/dt-bindings/soc/samsung/exynos9610-dm.h
new file mode 100644 (file)
index 0000000..908120c
--- /dev/null
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for Exynos9810
+*/
+
+#ifndef _DT_BINDINGS_EXYNOS_9820_H
+#define _DT_BINDINGS_EXYNOS_9820_H
+
+/* NUMBER FOR DVFS MANAGER */
+#define DM_CPU_CL0     0
+#define DM_CPU_CL1     1
+#define DM_CPU_CL2     2
+#define DM_MIF         3
+#define DM_INT         4
+#define DM_INTCAM      5
+#define DM_CAM         6
+#define DM_IVA         7
+#define DM_SCORE       8
+#define DM_DISP                9
+#define DM_AUD         10
+#define DM_MFC         11
+#define DM_NPU         12
+#define DM_GPU         13
+
+/* CONSTRAINT TYPE */
+#define CONSTRAINT_MIN 0
+#define CONSTRAINT_MAX 1
+
+#endif /* _DT_BINDINGS_EXYNOS_9820_H */