[media] ths8200: Corrected sync polarities setting
authorMartin Bugge <marbugge@cisco.com>
Fri, 7 Feb 2014 08:11:04 +0000 (05:11 -0300)
committerMauro Carvalho Chehab <m.chehab@samsung.com>
Fri, 28 Feb 2014 17:28:13 +0000 (14:28 -0300)
HS_IN/VS_IN was always set to positive.

Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
drivers/media/i2c/ths8200.c

index 5c7dca31de62fa9a0cee8dbf13ed953c4e830910..bcacf52357edb59d386d55855e63091103f13ace 100644 (file)
@@ -356,7 +356,7 @@ static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)
        /* Timing of video input bus is derived from HS, VS, and FID dedicated
         * inputs
         */
-       ths8200_write(sd, THS8200_DTG2_CNTL, 0x47 | polarity);
+       ths8200_write(sd, THS8200_DTG2_CNTL, 0x44 | polarity);
 
        /* leave reset */
        ths8200_s_stream(sd, true);