PCI: Add ACS quirk for Ampere root ports

[ Upstream commit 4ef76ad0462cf25ce948541c8724eaa8a8365e1d ]

The Ampere Computing PCIe root port does not support ACS at this point.
However, the hardware provides isolation and source validation through the
SMMU. The stream ID generated by the PCIe ports contain both the
bus/device/function number as well as the port ID in its 3 most significant
bits. Turn on ACS but disable all the peer-to-peer features.

APM is being rebranded to Ampere.  The Vendor and Device IDs change, but
the functionality stays the same.

Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f6e88d5b1c4f0288757f8de6165340b19fe31687..81d76e34b0db53ca955659eaa27a9c019459e7ce 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4610,6 +4610,15 @@ static const struct pci_dev_acs_enabled {
        { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
        /* APM X-Gene */
        { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
+       /* Ampere Computing */
+       { PCI_VENDOR_ID_AMPERE, 0xE005, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE006, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE007, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE008, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE009, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE00A, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE00B, pci_quirk_xgene_acs },
+       { PCI_VENDOR_ID_AMPERE, 0xE00C, pci_quirk_xgene_acs },
        { PCI_VENDOR_ID_BROADCOM, 0xD714, pci_quirk_brcm_acs },
        { 0 }
 };

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 7fa3f1498b340adb612bec87b7555eea30f6ee1a..bd882f51fb5f1d7ae5f60488d8b8c2a9602f6ee6 100644 (file)
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1331,6 +1331,7 @@
 #define PCI_DEVICE_ID_IMS_TT3D         0x9135
 
 #define PCI_VENDOR_ID_AMCC             0x10e8
+#define PCI_VENDOR_ID_AMPERE           0x1def
 
 #define PCI_VENDOR_ID_INTERG           0x10ea
 #define PCI_DEVICE_ID_INTERG_1682      0x1682