sh_eth: add missing EESIPR bits
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Sun, 29 Jan 2017 12:08:09 +0000 (15:08 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 31 Jan 2017 03:05:43 +0000 (22:05 -0500)
Renesas SH77{34|63} manuals  describe more EESIPR bits than the current
driver. Declare the new bits with the end goal of using the bit names
instead of the bare numbers  for  the 'sh_eth_cpu_data::eesipr_value'
initializers...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/sh_eth.h

index 82b24162c18d793010e6e56c8da1189d4153a1fe..a6753ccba711cd0dc331e132eaa7d0f20795f10c 100644 (file)
@@ -269,13 +269,17 @@ enum EESR_BIT {
 
 /* EESIPR */
 enum EESIPR_BIT {
-       EESIPR_TWBIP    = 0x40000000,
+       EESIPR_TWB1IP   = 0x80000000,
+       EESIPR_TWBIP    = 0x40000000,   /* same as TWB0IP */
+       EESIPR_TC1IP    = 0x20000000,
+       EESIPR_TUCIP    = 0x10000000,
+       EESIPR_ROCIP    = 0x08000000,
        EESIPR_TABTIP   = 0x04000000,
        EESIPR_RABTIP   = 0x02000000,
        EESIPR_RFCOFIP  = 0x01000000,
        EESIPR_ADEIP    = 0x00800000,
        EESIPR_ECIIP    = 0x00400000,
-       EESIPR_FTCIP    = 0x00200000,
+       EESIPR_FTCIP    = 0x00200000,   /* same as TC0IP */
        EESIPR_TDEIP    = 0x00100000,
        EESIPR_TFUFIP   = 0x00080000,
        EESIPR_FRIP     = 0x00040000,
@@ -286,6 +290,8 @@ enum EESIPR_BIT {
        EESIPR_CDIP     = 0x00000200,
        EESIPR_TROIP    = 0x00000100,
        EESIPR_RMAFIP   = 0x00000080,
+       EESIPR_CEEFIP   = 0x00000040,
+       EESIPR_CELFIP   = 0x00000020,
        EESIPR_RRFIP    = 0x00000010,
        EESIPR_RTLFIP   = 0x00000008,
        EESIPR_RTSFIP   = 0x00000004,