V4L/DVB: Fix bad whitespacing
authorMauro Carvalho Chehab <mchehab@redhat.com>
Thu, 11 Mar 2010 04:58:12 +0000 (01:58 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Tue, 18 May 2010 03:47:01 +0000 (00:47 -0300)
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/dvb/dvb-usb/az6027.c
drivers/media/dvb/frontends/atbm8830_priv.h
drivers/media/dvb/mantis/mantis_vp1041.c
drivers/media/video/davinci/isif_regs.h
drivers/media/video/gspca/ov534.c
drivers/media/video/ov9640.c

index 60787a28edb389fdeb2f657883fa5eea2e26d8d3..30ea3eff1ef7c06f5d0ea88a774dc1422e4467aa 100644 (file)
@@ -125,12 +125,12 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
        { STB0899_RCOMPC                , 0xc9 },
        { STB0899_AGC1CN                , 0x01 },
        { STB0899_AGC1REF               , 0x10 },
-       { STB0899_RTC                   , 0x23 },
+       { STB0899_RTC                   , 0x23 },
        { STB0899_TMGCFG                , 0x4e },
        { STB0899_AGC2REF               , 0x34 },
        { STB0899_TLSR                  , 0x84 },
        { STB0899_CFD                   , 0xf7 },
-       { STB0899_ACLC                  , 0x87 },
+       { STB0899_ACLC                  , 0x87 },
        { STB0899_BCLC                  , 0x94 },
        { STB0899_EQON                  , 0x41 },
        { STB0899_LDT                   , 0xf1 },
@@ -183,10 +183,10 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
        { STB0899_ECNT3M                , 0x0a },
        { STB0899_ECNT3L                , 0xad },
        { STB0899_FECAUTO1              , 0x06 },
-       { STB0899_FECM                  , 0x01 },
+       { STB0899_FECM                  , 0x01 },
        { STB0899_VTH12                 , 0xb0 },
        { STB0899_VTH23                 , 0x7a },
-       { STB0899_VTH34                 , 0x58 },
+       { STB0899_VTH34                 , 0x58 },
        { STB0899_VTH56                 , 0x38 },
        { STB0899_VTH67                 , 0x34 },
        { STB0899_VTH78                 , 0x24 },
@@ -195,7 +195,7 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
        { STB0899_RSULC                 , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
        { STB0899_TSULC                 , 0x42 },
        { STB0899_RSLLC                 , 0x41 },
-       { STB0899_TSLPL                 , 0x12 },
+       { STB0899_TSLPL                 , 0x12 },
        { STB0899_TSCFGH                , 0x0c },
        { STB0899_TSCFGM                , 0x00 },
        { STB0899_TSCFGL                , 0x00 },
index ce960f76092af5e4f2f3eda907a9436e4763731b..d460058d497e7151ebfc2240c230cebd9aec98cf 100644 (file)
@@ -18,7 +18,7 @@
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
+
 #ifndef __ATBM8830_PRIV_H
 #define __ATBM8830_PRIV_H
 
index 515346dd31d0834a2ad3a981426b24e5ee023bd7..d1aa2bc0c155af4e5d07e4975b8fb839b6c87bcf 100644 (file)
@@ -136,12 +136,12 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
        { STB0899_RCOMPC                , 0xc9 },
        { STB0899_AGC1CN                , 0x01 },
        { STB0899_AGC1REF               , 0x10 },
-       { STB0899_RTC                   , 0x23 },
+       { STB0899_RTC                   , 0x23 },
        { STB0899_TMGCFG                , 0x4e },
        { STB0899_AGC2REF               , 0x34 },
        { STB0899_TLSR                  , 0x84 },
        { STB0899_CFD                   , 0xf7 },
-       { STB0899_ACLC                  , 0x87 },
+       { STB0899_ACLC                  , 0x87 },
        { STB0899_BCLC                  , 0x94 },
        { STB0899_EQON                  , 0x41 },
        { STB0899_LDT                   , 0xf1 },
@@ -194,10 +194,10 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
        { STB0899_ECNT3M                , 0x0a },
        { STB0899_ECNT3L                , 0xad },
        { STB0899_FECAUTO1              , 0x06 },
-       { STB0899_FECM                  , 0x01 },
+       { STB0899_FECM                  , 0x01 },
        { STB0899_VTH12                 , 0xb0 },
        { STB0899_VTH23                 , 0x7a },
-       { STB0899_VTH34                 , 0x58 },
+       { STB0899_VTH34                 , 0x58 },
        { STB0899_VTH56                 , 0x38 },
        { STB0899_VTH67                 , 0x34 },
        { STB0899_VTH78                 , 0x24 },
@@ -206,7 +206,7 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
        { STB0899_RSULC                 , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
        { STB0899_TSULC                 , 0x42 },
        { STB0899_RSLLC                 , 0x41 },
-       { STB0899_TSLPL                 , 0x12 },
+       { STB0899_TSLPL                 , 0x12 },
        { STB0899_TSCFGH                , 0x0c },
        { STB0899_TSCFGM                , 0x00 },
        { STB0899_TSCFGL                , 0x00 },
index f7b8893a29579e989cef6f4652b399af432e6376..aa69a463c1228358a1742e06689ead57e49c6165 100644 (file)
 
 /* gain - offset masks */
 #define GAIN_INTEGER_SHIFT                     9
-#define OFFSET_MASK                            0xFFF
+#define OFFSET_MASK                            0xFFF
 #define GAIN_SDRAM_EN_SHIFT                    12
 #define GAIN_IPIPE_EN_SHIFT                    13
 #define GAIN_H3A_EN_SHIFT                      14
index 8cd193d18b742e5d6980c8ed360eb8f48180be0a..dc1e4efe30fb9f40f8749215d5a99624e0cb7780 100644 (file)
@@ -709,7 +709,7 @@ static void setexposure(struct gspca_dev *gspca_dev)
 
        /* 'val' is one byte and represents half of the exposure value we are
         * going to set into registers, a two bytes value:
-        * 
+        *
         *    MSB: ((u16) val << 1) >> 8   == val >> 7
         *    LSB: ((u16) val << 1) & 0xff == val << 1
         */
index 47bf60ceb7a26feaee7afa23b2ec4d916e39defd..36599a65f54851759f47a5a412bd5fdc629b8e1f 100644 (file)
@@ -59,9 +59,9 @@ static const struct ov9640_reg ov9640_regs_dflt[] = {
  *             COM12 |= OV9640_COM12_YUV_AVG
  *
  *      for RGB, alter the following registers:
- *             COM7  |= OV9640_COM7_RGB
- *             COM13 |= OV9640_COM13_RGB_AVG
- *             COM15 |= proper RGB color encoding mode
+ *             COM7  |= OV9640_COM7_RGB
+ *             COM13 |= OV9640_COM13_RGB_AVG
+ *             COM15 |= proper RGB color encoding mode
  */
 static const struct ov9640_reg ov9640_regs_qqcif[] = {
        { OV9640_CLKRC, OV9640_CLKRC_DPLL_EN | OV9640_CLKRC_DIV(0x0f) },