drm/i915: Work-around garbage DR4 from UXA
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 13 May 2014 11:37:37 +0000 (13:37 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 13 May 2014 15:16:13 +0000 (17:16 +0200)
commitffd93f24800dfbf55e9a245884cbfd8e427fc210
tree9c165ff8a3430a6b804a8fde47046f11da9f3261
parentd8ffa60b52ab171e89aebdbdd96dbe2a2460a5dd
drm/i915: Work-around garbage DR4 from UXA

Somehow UXA submits a completely bogus DR4 value since essentially
forever. It was originally introduced in

commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64
Author: Eric Anholt <eric@anholt.net>
Date:   Fri Jun 6 14:03:25 2008 -0700

    Use the DRM for submitting batchbuffers when available.

and dutifully copied around ever since. Since we want to keep the
general dirt catching around just special case the UXA value.

This regression was introduced in

commit 9cb346648d9c529eccc5c7f30093e82d37004e37
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Apr 24 08:09:11 2014 +0200

    drm/i915: Catch dirt in unused execbuffer fields

Comment from Chris' review:

"To be fair, it is a sensible value if one supposes a Region style API to
cliprects. Under that API, DR[14] define the extents of the clip region,
and ((0,0), (0,0)) [DR1==DR4==0] would mean all clipped, do not draw
anything."

v2: Pimp commit message a bit and remove the double space.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78494
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jörg Otte <jrg.otte@gmail.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_gem_execbuffer.c