MIPS: Fix accessing to per-cpu data when flushing the cache
This fixes the following issue
BUG: using smp_processor_id() in preemptible [
00000000] code: kjournald/1761
caller is blast_dcache32+0x30/0x254
Call Trace:
[<
8047f02c>] dump_stack+0x8/0x34
[<
802e7e40>] debug_smp_processor_id+0xe0/0xf0
[<
80114d94>] blast_dcache32+0x30/0x254
[<
80118484>] r4k_dma_cache_wback_inv+0x200/0x288
[<
80110ff0>] mips_dma_map_sg+0x108/0x180
[<
80355098>] ide_dma_prepare+0xf0/0x1b8
[<
8034eaa4>] do_rw_taskfile+0x1e8/0x33c
[<
8035951c>] ide_do_rw_disk+0x298/0x3e4
[<
8034a3c4>] do_ide_request+0x2e0/0x704
[<
802bb0dc>] __blk_run_queue+0x44/0x64
[<
802be000>] queue_unplugged.isra.36+0x1c/0x54
[<
802beb94>] blk_flush_plug_list+0x18c/0x24c
[<
802bec6c>] blk_finish_plug+0x18/0x48
[<
8026554c>] journal_commit_transaction+0x3b8/0x151c
[<
80269648>] kjournald+0xec/0x238
[<
8014ac00>] kthread+0xb8/0xc0
[<
8010268c>] ret_from_kernel_thread+0x14/0x1c
Caches in most systems are identical - but not always, so we can't avoid
the use of smp_call_function() by just looking at the boot CPU's data,
have to fiddle with preemption instead.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5835