xtensa: increase ranges in ___invalidate_{i,d}cache_all
authorMax Filippov <jcmvbkbc@gmail.com>
Sat, 11 Aug 2018 05:21:22 +0000 (22:21 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 9 Sep 2018 17:55:59 +0000 (19:55 +0200)
commitfe806eb54bca42f854e2b74a08ebbba5a860f473
treec3087a955b7100701ab03c9d4b77edf2fb92c6e7
parent0d78efe0412b1b60409d3c977717c4c2625560f4
xtensa: increase ranges in ___invalidate_{i,d}cache_all

commit fec3259c9f747c039f90e99570540114c8d81a14 upstream.

Cache invalidation macros use cache line size to iterate over
invalidated cache lines, assuming that all cache ways are invalidated by
single instruction, but xtensa ISA recommends to not assume that for
future compatibility:
  In some implementations all ways at index Addry-1..z are invalidated
  regardless of the specified way, but for future compatibility this
  behavior should not be assumed.

Iterate over all cache ways in ___invalidate_icache_all and
___invalidate_dcache_all.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/xtensa/include/asm/cacheasm.h