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ARM: dts: r8a7793: Add L2 cache-controller node
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 3 Jun 2015 08:36:39 +0000 (10:36 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Fri, 19 Feb 2016 05:52:23 +0000 (14:52 +0900)
commitfdd0dbd8a28612195dfbfb08c404ef5bcfa48e43
tree553f9d04e8368197e6c5c8b49e573d51677bf942tree | snapshot (tar.gz zip)
parent8ffe93a5b2cb55d4da9c285d9277699bdb828b47commit | diff
ARM: dts: r8a7793: Add L2 cache-controller node

Add a device node for the L2 cache, and link the CPU node to it.

The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7793.dtsi diff | blob | blame | history